Revision beebb570 target-mips/translate.c

b/target-mips/translate.c
745 745 
        save_cpu_state(ctx, 1);
746 746 
        GEN_LOAD_REG_TN(T1, rt);
747 747 
        op_ldst(scd);
748 
        GEN_STORE_TN_REG(rt, T0);
748 749 
        opn = "scd";
749 750 
        break;
750 751 
    case OPC_LDL:

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