Revision bf20dc07 target-mips/translate.c

b/target-mips/translate.c
3998 3998
                rn, reg, sel);
3999 3999
    }
4000 4000
#endif
4001
    /* For simplicitly assume that all writes can cause interrupts.  */
4001
    /* For simplicity assume that all writes can cause interrupts.  */
4002 4002
    if (use_icount) {
4003 4003
        gen_io_end();
4004 4004
        ctx->bstate = BS_STOP;
......
5170 5170
    }
5171 5171
#endif
5172 5172
    tcg_temp_free(t0);
5173
    /* For simplicitly assume that all writes can cause interrupts.  */
5173
    /* For simplicity assume that all writes can cause interrupts.  */
5174 5174
    if (use_icount) {
5175 5175
        gen_io_end();
5176 5176
        ctx->bstate = BS_STOP;

Also available in: Unified diff