Revision bf76bafa target-cris/translate_v10.c
| b/target-cris/translate_v10.c | ||
|---|---|---|
| 23 | 23 |
|
| 24 | 24 |
static const char *regnames_v10[] = |
| 25 | 25 |
{
|
| 26 |
"$r0", "$r1", "$r2", "$r3",
|
|
| 27 |
"$r4", "$r5", "$r6", "$r7",
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|
| 28 |
"$r8", "$r9", "$r10", "$r11",
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| 29 |
"$r12", "$r13", "$sp", "$pc",
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| 26 |
"$r0", "$r1", "$r2", "$r3",
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| 27 |
"$r4", "$r5", "$r6", "$r7",
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| 28 |
"$r8", "$r9", "$r10", "$r11",
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| 29 |
"$r12", "$r13", "$sp", "$pc",
|
|
| 30 | 30 |
}; |
| 31 | 31 |
|
| 32 | 32 |
static const char *pregnames_v10[] = |
| 33 | 33 |
{
|
| 34 |
"$bz", "$vr", "$p2", "$p3",
|
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| 35 |
"$wz", "$ccr", "$p6-prefix", "$mof",
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| 36 |
"$dz", "$ibr", "$irp", "$srp",
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"$bar", "$dccr", "$brp", "$usp",
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"$bz", "$vr", "$p2", "$p3",
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"$wz", "$ccr", "$p6-prefix", "$mof",
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"$dz", "$ibr", "$irp", "$srp",
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"$bar", "$dccr", "$brp", "$usp",
|
|
| 38 | 38 |
}; |
| 39 | 39 |
|
| 40 | 40 |
/* We need this table to handle preg-moves with implicit width. */ |
| 41 | 41 |
static int preg_sizes_v10[] = {
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1, /* bz. */
|
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1, /* vr. */
|
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1, /* pid. */
|
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1, /* srs. */
|
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2, /* wz. */
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2, 2, 4,
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4, 4, 4, 4,
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4, 4, 4, 4,
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1, /* bz. */
|
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1, /* vr. */
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1, /* pid. */
|
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1, /* srs. */
|
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2, /* wz. */
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2, 2, 4,
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4, 4, 4, 4,
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4, 4, 4, 4,
|
|
| 50 | 50 |
}; |
| 51 | 51 |
|
| 52 | 52 |
static inline int dec10_size(unsigned int size) |
| ... | ... | |
| 109 | 109 |
static int dec10_prep_move_m(DisasContext *dc, int s_ext, int memsize, |
| 110 | 110 |
TCGv dst) |
| 111 | 111 |
{
|
| 112 |
unsigned int rs, rd; |
|
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uint32_t imm; |
|
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int is_imm; |
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int insn_len = 0; |
|
| 116 |
|
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rs = dc->src; |
|
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rd = dc->dst; |
|
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is_imm = rs == 15 && !(dc->tb_flags & PFIX_FLAG); |
|
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LOG_DIS("rs=%d rd=%d is_imm=%d mode=%d pfix=%d\n",
|
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rs, rd, is_imm, dc->mode, dc->tb_flags & PFIX_FLAG); |
|
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|
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/* Load [$rs] onto T1. */ |
|
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if (is_imm) {
|
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if (memsize != 4) {
|
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if (s_ext) {
|
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if (memsize == 1) |
|
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imm = ldsb_code(dc->pc + 2); |
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else |
|
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imm = ldsw_code(dc->pc + 2); |
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} else {
|
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if (memsize == 1) |
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imm = ldub_code(dc->pc + 2); |
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else |
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imm = lduw_code(dc->pc + 2); |
|
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} |
|
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} else |
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imm = ldl_code(dc->pc + 2); |
|
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|
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tcg_gen_movi_tl(dst, imm); |
|
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|
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if (dc->mode == CRISV10_MODE_AUTOINC) {
|
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insn_len += memsize; |
|
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if (memsize == 1) |
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insn_len++; |
|
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tcg_gen_addi_tl(cpu_R[15], cpu_R[15], insn_len); |
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} |
|
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} else {
|
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TCGv addr; |
|
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|
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addr = tcg_temp_new(); |
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cris_flush_cc_state(dc); |
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crisv10_prepare_memaddr(dc, addr, memsize); |
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gen_load(dc, dst, addr, memsize, 0); |
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if (s_ext) |
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t_gen_sext(dst, dst, memsize); |
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unsigned int rs, rd; |
|
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uint32_t imm; |
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int is_imm; |
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int insn_len = 0; |
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|
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rs = dc->src; |
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rd = dc->dst; |
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is_imm = rs == 15 && !(dc->tb_flags & PFIX_FLAG); |
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LOG_DIS("rs=%d rd=%d is_imm=%d mode=%d pfix=%d\n",
|
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rs, rd, is_imm, dc->mode, dc->tb_flags & PFIX_FLAG); |
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|
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/* Load [$rs] onto T1. */ |
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if (is_imm) {
|
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if (memsize != 4) {
|
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if (s_ext) {
|
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if (memsize == 1) |
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imm = ldsb_code(dc->pc + 2); |
|
| 157 | 129 |
else |
| 158 |
t_gen_zext(dst, dst, memsize); |
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insn_len += crisv10_post_memaddr(dc, memsize); |
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tcg_temp_free(addr); |
|
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} |
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imm = ldsw_code(dc->pc + 2); |
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} else {
|
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if (memsize == 1) |
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imm = ldub_code(dc->pc + 2); |
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else |
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imm = lduw_code(dc->pc + 2); |
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} |
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} else |
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imm = ldl_code(dc->pc + 2); |
|
| 162 | 139 |
|
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if (dc->mode == CRISV10_MODE_INDIRECT && (dc->tb_flags & PFIX_FLAG)) {
|
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dc->dst = dc->src; |
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tcg_gen_movi_tl(dst, imm); |
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|
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if (dc->mode == CRISV10_MODE_AUTOINC) {
|
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insn_len += memsize; |
|
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if (memsize == 1) |
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insn_len++; |
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tcg_gen_addi_tl(cpu_R[15], cpu_R[15], insn_len); |
|
| 165 | 147 |
} |
| 166 |
return insn_len; |
|
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} else {
|
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TCGv addr; |
|
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|
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addr = tcg_temp_new(); |
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cris_flush_cc_state(dc); |
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crisv10_prepare_memaddr(dc, addr, memsize); |
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gen_load(dc, dst, addr, memsize, 0); |
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if (s_ext) |
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t_gen_sext(dst, dst, memsize); |
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else |
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t_gen_zext(dst, dst, memsize); |
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insn_len += crisv10_post_memaddr(dc, memsize); |
|
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tcg_temp_free(addr); |
|
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} |
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|
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if (dc->mode == CRISV10_MODE_INDIRECT && (dc->tb_flags & PFIX_FLAG)) {
|
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dc->dst = dc->src; |
|
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} |
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return insn_len; |
|
| 167 | 167 |
} |
| 168 | 168 |
|
| 169 | 169 |
static unsigned int dec10_quick_imm(DisasContext *dc) |
| ... | ... | |
| 439 | 439 |
|
| 440 | 440 |
static void dec10_reg_abs(DisasContext *dc) |
| 441 | 441 |
{
|
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TCGv t0;
|
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TCGv t0;
|
|
| 443 | 443 |
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LOG_DIS("abs $r%u, $r%u\n",
|
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dc->src, dc->dst); |
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LOG_DIS("abs $r%u, $r%u\n", dc->src, dc->dst);
|
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| 446 | 445 |
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assert(dc->dst != 15);
|
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t0 = tcg_temp_new();
|
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tcg_gen_sari_tl(t0, cpu_R[dc->src], 31);
|
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| 450 |
tcg_gen_xor_tl(cpu_R[dc->dst], cpu_R[dc->src], t0);
|
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tcg_gen_sub_tl(t0, cpu_R[dc->dst], t0);
|
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assert(dc->dst != 15);
|
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t0 = tcg_temp_new();
|
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tcg_gen_sari_tl(t0, cpu_R[dc->src], 31);
|
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tcg_gen_xor_tl(cpu_R[dc->dst], cpu_R[dc->src], t0);
|
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tcg_gen_sub_tl(t0, cpu_R[dc->dst], t0);
|
|
| 452 | 451 |
|
| 453 |
cris_alu(dc, CC_OP_MOVE, |
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| 454 |
cpu_R[dc->dst], cpu_R[dc->dst], t0, 4); |
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tcg_temp_free(t0); |
|
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cris_alu(dc, CC_OP_MOVE, cpu_R[dc->dst], cpu_R[dc->dst], t0, 4); |
|
| 453 |
tcg_temp_free(t0); |
|
| 456 | 454 |
} |
| 457 | 455 |
|
| 458 | 456 |
static void dec10_reg_swap(DisasContext *dc) |
| ... | ... | |
| 478 | 476 |
|
| 479 | 477 |
static void dec10_reg_scc(DisasContext *dc) |
| 480 | 478 |
{
|
| 481 |
int cond = dc->dst;
|
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| 479 |
int cond = dc->dst; |
|
| 482 | 480 |
|
| 483 |
LOG_DIS("s%s $r%u\n",
|
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| 484 |
cc_name(cond), dc->src); |
|
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LOG_DIS("s%s $r%u\n", cc_name(cond), dc->src);
|
|
| 485 | 482 |
|
| 486 |
if (cond != CC_A)
|
|
| 487 |
{
|
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| 488 |
int l1;
|
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| 483 |
if (cond != CC_A) |
|
| 484 |
{
|
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| 485 |
int l1; |
|
| 489 | 486 |
|
| 490 |
gen_tst_cc (dc, cpu_R[dc->src], cond);
|
|
| 491 |
l1 = gen_new_label();
|
|
| 492 |
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->src], 0, l1);
|
|
| 493 |
tcg_gen_movi_tl(cpu_R[dc->src], 1);
|
|
| 494 |
gen_set_label(l1);
|
|
| 495 |
}
|
|
| 496 |
else
|
|
| 497 |
tcg_gen_movi_tl(cpu_R[dc->src], 1);
|
|
| 487 |
gen_tst_cc (dc, cpu_R[dc->src], cond); |
|
| 488 |
l1 = gen_new_label(); |
|
| 489 |
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->src], 0, l1); |
|
| 490 |
tcg_gen_movi_tl(cpu_R[dc->src], 1); |
|
| 491 |
gen_set_label(l1); |
|
| 492 |
} else {
|
|
| 493 |
tcg_gen_movi_tl(cpu_R[dc->src], 1);
|
|
| 494 |
}
|
|
| 498 | 495 |
|
| 499 |
cris_cc_mask(dc, 0);
|
|
| 496 |
cris_cc_mask(dc, 0); |
|
| 500 | 497 |
} |
| 501 | 498 |
|
| 502 | 499 |
static unsigned int dec10_reg(DisasContext *dc) |
| ... | ... | |
| 838 | 835 |
tcg_gen_mov_tl(cpu_R[dc->src], t0); |
| 839 | 836 |
} |
| 840 | 837 |
|
| 841 |
|
|
| 842 | 838 |
if (!pfix && dc->mode == CRISV10_MODE_AUTOINC) {
|
| 843 | 839 |
tcg_gen_mov_tl(cpu_R[dc->src], addr); |
| 844 | 840 |
} |
Also available in: Unified diff