27 |
27 |
{
|
28 |
28 |
CPUState *env = opaque;
|
29 |
29 |
uint16_t fpregs_format;
|
30 |
|
int32_t pending_irq;
|
31 |
30 |
int i, bit;
|
32 |
31 |
|
33 |
32 |
cpu_synchronize_state(env);
|
... | ... | |
142 |
141 |
|
143 |
142 |
/* There can only be one pending IRQ set in the bitmap at a time, so try
|
144 |
143 |
to find it and save its number instead (-1 for none). */
|
145 |
|
pending_irq = -1;
|
|
144 |
env->pending_irq_vmstate = -1;
|
146 |
145 |
for (i = 0; i < ARRAY_SIZE(env->interrupt_bitmap); i++) {
|
147 |
146 |
if (env->interrupt_bitmap[i]) {
|
148 |
147 |
bit = ctz64(env->interrupt_bitmap[i]);
|
149 |
|
pending_irq = i * 64 + bit;
|
|
148 |
env->pending_irq_vmstate = i * 64 + bit;
|
150 |
149 |
break;
|
151 |
150 |
}
|
152 |
151 |
}
|
153 |
|
qemu_put_sbe32s(f, &pending_irq);
|
|
152 |
qemu_put_sbe32s(f, &env->pending_irq_vmstate);
|
154 |
153 |
qemu_put_be32s(f, &env->mp_state);
|
155 |
154 |
qemu_put_be64s(f, &env->tsc);
|
156 |
155 |
|
... | ... | |
198 |
197 |
CPUState *env = opaque;
|
199 |
198 |
int i, guess_mmx;
|
200 |
199 |
uint16_t fpregs_format;
|
201 |
|
int32_t pending_irq;
|
202 |
200 |
|
203 |
201 |
cpu_synchronize_state(env);
|
204 |
202 |
if (version_id < 3 || version_id > CPU_SAVE_VERSION)
|
... | ... | |
344 |
342 |
}
|
345 |
343 |
|
346 |
344 |
if (version_id >= 9) {
|
347 |
|
qemu_get_sbe32s(f, &pending_irq);
|
|
345 |
qemu_get_sbe32s(f, &env->pending_irq_vmstate);
|
348 |
346 |
memset(&env->interrupt_bitmap, 0, sizeof(env->interrupt_bitmap));
|
349 |
|
if (pending_irq >= 0) {
|
350 |
|
env->interrupt_bitmap[pending_irq / 64] |=
|
351 |
|
(uint64_t)1 << (pending_irq % 64);
|
|
347 |
if (env->pending_irq_vmstate >= 0) {
|
|
348 |
env->interrupt_bitmap[env->pending_irq_vmstate / 64] |=
|
|
349 |
(uint64_t)1 << (env->pending_irq_vmstate % 64);
|
352 |
350 |
}
|
353 |
351 |
qemu_get_be32s(f, &env->mp_state);
|
354 |
352 |
qemu_get_be64s(f, &env->tsc);
|