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Name Size
TODO 1.1 kB
cpu.h 26.6 kB
exec.h 9.3 kB
helper.c 62.7 kB
helper.h 6.2 kB
helper_template.h 8.6 kB
kvm.c 25.7 kB
machine.c 10.9 kB
op_helper.c 158.6 kB
ops_sse.h 58.1 kB
ops_sse_header.h 11.6 kB
svm.h 5.8 kB
translate.c 256.9 kB

Latest revisions

# Date Author Comment
eb831623 10/05/2009 05:32 pm Juan Quintela

x86: fpuc is uint16_t not unsigned int

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
67b8f419 10/05/2009 05:32 pm Juan Quintela

x86: fpus is uint16_t not unsigned int

We save more that fpus on that 16 bits (fpstt), we need an additional field

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
cdc0c58f 10/05/2009 05:32 pm Juan Quintela

x86: add fptag_vmstate to the state

It is needed to store fptags

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
bfc179b6 10/05/2009 05:32 pm Juan Quintela

x86: add pending_irq_vmstate to the state

It is needed to save the interrupt_bitmap

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
1f76b9b9 10/05/2009 05:32 pm Juan Quintela

x86: hflags is not modified at all, just save it directly

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>
5ee0ffaa 10/05/2009 05:32 pm Juan Quintela

x86: make a20_mask int32_t

This makes the savevm code correct, and sign extensins gives us exactly
what we need (namely, sign extend to 64 bits when used with 64bit addresess.

Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax....
09d85fb8 10/05/2009 12:10 am Kevin Wolf

target-i386: Fix exceptions for fxsave/fxrstor

This patch corrects the following aspects of exception generation in
fxsave/fxrstor:

  • Generate #GP if the operand is not aligned to a 16 byte boundary
  • Generate #UD if the LOCK prefix is used
  • For CR0.EM = 1 #NM is generated, not #UD...
1b050077 10/04/2009 03:46 pm Andre Przywara

target-i386: add RDTSCP support

RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()...
d9f4bb27 10/04/2009 03:09 pm Andre Przywara

target-i386: add SSE4a instruction support

This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register)....
ccd59d09 10/04/2009 03:04 pm Andre Przywara

target-i386: add lock mov cr0 = cr8

AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.
If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.
This behavior is guarded by the CR8_LEGACY CPUID bit
(Fn8000_0001:ECX1).

Signed-off-by: Andre Przywara <>...

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