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.include "macros.inc"
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test_suite interrupt
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.macro clear_interrupts
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    movi    a2, 0
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    wsr     a2, intenable
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    wsr     a2, ccompare0
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    wsr     a2, ccompare1
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    wsr     a2, ccompare2
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    esync
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    rsr     a2, interrupt
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    wsr     a2, intclear
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    esync
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    rsr     a2, interrupt
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    assert  eqi, a2, 0
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.endm
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.macro check_l1
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    rsr     a2, ps
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    movi    a3, 0x1f        /* EXCM | INTMASK */
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    and     a2, a2, a3
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    assert  eqi, a2, 0x10   /* only EXCM is set for level-1 interrupt */
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    rsr     a2, exccause
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    assert  eqi, a2, 4
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.endm
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test rsil
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    clear_interrupts
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    rsr     a2, ps
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    rsil    a3, 7
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    rsr     a4, ps
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    assert  eq, a2, a3
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    movi    a2, 0xf
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    and     a2, a4, a2
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    assert  eqi, a2, 7
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    xor     a3, a3, a4
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    movi    a2, 0xfffffff0
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    and     a2, a3, a2
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    assert  eqi, a2, 0
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test_end
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test soft_disabled
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    set_vector kernel, 1f
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    clear_interrupts
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    movi    a2, 0x80
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    wsr     a2, intset
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    esync
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    rsr     a3, interrupt
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    assert  eq, a2, a3
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    wsr     a2, intclear
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    esync
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    rsr     a3, interrupt
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    assert  eqi, a3, 0
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    j       2f
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1:
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    test_fail
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2:
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test_end
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test soft_intenable
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    set_vector kernel, 1f
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    clear_interrupts
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    movi    a2, 0x80
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    wsr     a2, intset
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    esync
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    rsr     a3, interrupt
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    assert  eq, a2, a3
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    rsil    a3, 0
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    wsr     a2, intenable
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    esync
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    test_fail
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1:
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    check_l1
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test_end
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test soft_rsil
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    set_vector kernel, 1f
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    clear_interrupts
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    movi    a2, 0x80
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    wsr     a2, intset
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    esync
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    rsr     a3, interrupt
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    assert  eq, a2, a3
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    wsr     a2, intenable
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    rsil    a3, 0
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    esync
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    test_fail
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1:
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    check_l1
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test_end
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test soft_waiti
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    set_vector kernel, 1f
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    clear_interrupts
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    movi    a2, 0x80
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    wsr     a2, intset
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    esync
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    rsr     a3, interrupt
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    assert  eq, a2, a3
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    wsr     a2, intenable
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    waiti   0
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    test_fail
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1:
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    check_l1
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test_end
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test soft_user
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    set_vector kernel, 1f
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    set_vector user, 2f
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    clear_interrupts
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    movi    a2, 0x80
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    wsr     a2, intset
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    esync
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    rsr     a3, interrupt
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    assert  eq, a2, a3
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    wsr     a2, intenable
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    rsr     a2, ps
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    movi    a3, 0x20
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    or      a2, a2, a3
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    wsr     a2, ps
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    waiti   0
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    test_fail
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2:
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    check_l1
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test_end
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test soft_priority
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    set_vector kernel, 1f
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    set_vector level3, 2f
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    clear_interrupts
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    movi    a2, 0x880
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    wsr     a2, intenable
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    rsil    a3, 0
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    esync
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    wsr     a2, intset
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    esync
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    test_fail
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2:
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    rsr     a2, ps
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    movi    a3, 0x1f        /* EXCM | INTMASK */
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    and     a2, a2, a3
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    movi    a3, 0x13
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    assert  eq, a2, a3      /* EXCM and INTMASK are set
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                               for high-priority interrupt */
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test_end
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test eps_epc_rfi
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    set_vector level3, 3f
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    clear_interrupts
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    reset_ps
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    movi    a2, 0x880
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    wsr     a2, intenable
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    rsil    a3, 0
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    rsr     a3, ps
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    esync
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    wsr     a2, intset
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    esync
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2:
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    test_fail
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    rsr     a2, eps3
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    assert  eq, a2, a3
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    rsr     a2, epc3
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    movi    a3, 1b
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    assert  ge, a2, a3
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    movi    a3, 2b
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    assert  ge, a3, a2
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    movi    a2, 4f
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    wsr     a2, epc3
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    movi    a2, 0x40003
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    wsr     a2, eps3
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    rfi     3
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    test_fail
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    rsr     a2, ps
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    movi    a3, 0x40003
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    assert  eq, a2, a3
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test_end
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test_suite_end