Revision c1713132 target-arm/cpu.h
| b/target-arm/cpu.h | ||
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| 38 | 38 |
#define EXCP_FIQ 6 |
| 39 | 39 |
#define EXCP_BKPT 7 |
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typedef void ARMWriteCPFunc(void *opaque, int cp_info, |
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int srcreg, int operand, uint32_t value); |
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typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info, |
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int dstreg, int operand); |
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/* We currently assume float and double are IEEE single and double |
| 42 | 47 |
precision respectively. |
| 43 | 48 |
Doing runtime conversions is tricky because VFP registers may contain |
| ... | ... | |
| 75 | 80 |
/* System control coprocessor (cp15) */ |
| 76 | 81 |
struct {
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uint32_t c0_cpuid; |
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uint32_t c0_cachetype; |
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| 78 | 84 |
uint32_t c1_sys; /* System control register. */ |
| 79 | 85 |
uint32_t c1_coproc; /* Coprocessor access register. */ |
| 80 | 86 |
uint32_t c2; /* MMU translation table base. */ |
| ... | ... | |
| 87 | 93 |
uint32_t c9_data; |
| 88 | 94 |
uint32_t c13_fcse; /* FCSE PID. */ |
| 89 | 95 |
uint32_t c13_context; /* Context ID. */ |
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uint32_t c15_cpar; /* XScale Coprocessor Access Register */ |
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| 90 | 97 |
} cp15; |
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/* Coprocessor IO used by peripherals */ |
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struct {
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ARMReadCPFunc *cp_read; |
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ARMWriteCPFunc *cp_write; |
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void *opaque; |
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} cp[15]; |
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/* Internal CPU feature flags. */ |
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uint32_t features; |
| 94 | 108 |
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| ... | ... | |
| 204 | 218 |
#define ARM_VFP_FPINST 9 |
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#define ARM_VFP_FPINST2 10 |
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enum arm_features {
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ARM_FEATURE_VFP, |
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ARM_FEATURE_AUXCR /* ARM1026 Auxiliary control register. */ |
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ARM_FEATURE_AUXCR, /* ARM1026 Auxiliary control register. */ |
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ARM_FEATURE_XSCALE, /* Intel XScale extensions. */ |
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}; |
| 212 | 226 |
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static inline int arm_feature(CPUARMState *env, int feature) |
| ... | ... | |
| 218 | 232 |
void arm_cpu_list(void); |
| 219 | 233 |
void cpu_arm_set_model(CPUARMState *env, const char *name); |
| 220 | 234 |
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#define ARM_CPUID_ARM1026 0x4106a262 |
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#define ARM_CPUID_ARM926 0x41069265 |
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void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, |
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ARMReadCPFunc *cp_read, ARMWriteCPFunc *cp_write, |
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void *opaque); |
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#define ARM_CPUID_ARM1026 0x4106a262 |
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#define ARM_CPUID_ARM926 0x41069265 |
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#define ARM_CPUID_PXA250 0x69052100 |
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#define ARM_CPUID_PXA255 0x69052d00 |
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#define ARM_CPUID_PXA260 0x69052903 |
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#define ARM_CPUID_PXA261 0x69052d05 |
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#define ARM_CPUID_PXA262 0x69052d06 |
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#define ARM_CPUID_PXA270 0x69054110 |
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#define ARM_CPUID_PXA270_A0 0x69054110 |
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#define ARM_CPUID_PXA270_A1 0x69054111 |
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#define ARM_CPUID_PXA270_B0 0x69054112 |
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#define ARM_CPUID_PXA270_B1 0x69054113 |
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#define ARM_CPUID_PXA270_C0 0x69054114 |
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#define ARM_CPUID_PXA270_C5 0x69054117 |
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#if defined(CONFIG_USER_ONLY) |
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#define TARGET_PAGE_BITS 12 |
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