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root / target-mips @ c2162a8b

Name Size
TODO 1.9 kB
cpu.h 21.4 kB
helper.c 22 kB
helper.h 8.8 kB
machine.c 10.6 kB
mips-defs.h 2.1 kB
op_helper.c 105.5 kB
translate.c 364 kB
translate_init.c 22.3 kB

Latest revisions

# Date Author Comment
1dab005a 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Default to using one VPE and one TC.

Boards can override the setup if needed.

Signed-off-by: Edgar E. Iglesias <>
9e56e756 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Initialize MT state at reset

Only TC0 on VPE0 is active after reset. All other VPEs and
TCs start in sleep.

Signed-off-by: Edgar E. Iglesias <>
f249412c 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Add MT halting and waking of VPEs

+ some partial support for TC's.

Signed-off-by: Edgar E. Iglesias <>
344eecf6 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Support the MT TCStatus IXMT irq disable flag

Signed-off-by: Edgar E. Iglesias <>
b93bbdcd 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Handle TC indexing of other VPEs

Introduce mips_cpu_map_tc() to map a global TC index into a VPE nr
and local tc index.

Signed-off-by: Edgar E. Iglesias <>
fe8dca8c 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Synchronize CP0 TCSTatus, Status and EntryHi

These registers share some of their fields. Writes to these fields
should be visible through the corresponding mirror fields.

Signed-off-by: Edgar E. Iglesias <>
5a25ce94 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Hook in more reg accesses via mttr/mftr

Signed-off-by: Edgar E. Iglesias <>
bc45a67a 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Correct IntCtl write mask for VInt

Signed-off-by: Edgar E. Iglesias <>
e4280973 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Correct VInt vector generation

1. The pending need to pass the Status IM gating.
2. The priority is from seven (highest prio) down to zero.
QEMU was doing the opposite.

Signed-off-by: Edgar E. Iglesias <>
ded40088 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Enable VInt interrupt mode for the 34Kf

Signed-off-by: Edgar E. Iglesias <>

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