Revision c227f099 hw/cirrus_vga.c
| b/hw/cirrus_vga.c | ||
|---|---|---|
| 1214 | 1214 |
/* Thinking about changing bank base? First, drop the dirty bitmap information |
| 1215 | 1215 |
* on the current location, otherwise we lose this pointer forever */ |
| 1216 | 1216 |
if (s->vga.lfb_vram_mapped) {
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| 1217 |
a_target_phys_addr base_addr = isa_mem_base + 0xa0000 + bank_index * 0x8000;
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| 1217 |
target_phys_addr_t base_addr = isa_mem_base + 0xa0000 + bank_index * 0x8000;
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|
| 1218 | 1218 |
cpu_physical_sync_dirty_bitmap(base_addr, base_addr + 0x8000); |
| 1219 | 1219 |
} |
| 1220 | 1220 |
s->cirrus_bank_base[bank_index] = offset; |
| ... | ... | |
| 1988 | 1988 |
* |
| 1989 | 1989 |
***************************************/ |
| 1990 | 1990 |
|
| 1991 |
static uint32_t cirrus_vga_mem_readb(void *opaque, a_target_phys_addr addr)
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|
| 1991 |
static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr)
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|
| 1992 | 1992 |
{
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| 1993 | 1993 |
CirrusVGAState *s = opaque; |
| 1994 | 1994 |
unsigned bank_index; |
| ... | ... | |
| 2032 | 2032 |
return val; |
| 2033 | 2033 |
} |
| 2034 | 2034 |
|
| 2035 |
static uint32_t cirrus_vga_mem_readw(void *opaque, a_target_phys_addr addr)
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| 2035 |
static uint32_t cirrus_vga_mem_readw(void *opaque, target_phys_addr_t addr)
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| 2036 | 2036 |
{
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| 2037 | 2037 |
uint32_t v; |
| 2038 | 2038 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2045 | 2045 |
return v; |
| 2046 | 2046 |
} |
| 2047 | 2047 |
|
| 2048 |
static uint32_t cirrus_vga_mem_readl(void *opaque, a_target_phys_addr addr)
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|
| 2048 |
static uint32_t cirrus_vga_mem_readl(void *opaque, target_phys_addr_t addr)
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|
| 2049 | 2049 |
{
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| 2050 | 2050 |
uint32_t v; |
| 2051 | 2051 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2062 | 2062 |
return v; |
| 2063 | 2063 |
} |
| 2064 | 2064 |
|
| 2065 |
static void cirrus_vga_mem_writeb(void *opaque, a_target_phys_addr addr,
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|
| 2065 |
static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr,
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|
| 2066 | 2066 |
uint32_t mem_value) |
| 2067 | 2067 |
{
|
| 2068 | 2068 |
CirrusVGAState *s = opaque; |
| ... | ... | |
| 2127 | 2127 |
} |
| 2128 | 2128 |
} |
| 2129 | 2129 |
|
| 2130 |
static void cirrus_vga_mem_writew(void *opaque, a_target_phys_addr addr, uint32_t val)
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|
| 2130 |
static void cirrus_vga_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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| 2131 | 2131 |
{
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| 2132 | 2132 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 2133 | 2133 |
cirrus_vga_mem_writeb(opaque, addr, (val >> 8) & 0xff); |
| ... | ... | |
| 2138 | 2138 |
#endif |
| 2139 | 2139 |
} |
| 2140 | 2140 |
|
| 2141 |
static void cirrus_vga_mem_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
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|
| 2141 |
static void cirrus_vga_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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| 2142 | 2142 |
{
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| 2143 | 2143 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 2144 | 2144 |
cirrus_vga_mem_writeb(opaque, addr, (val >> 24) & 0xff); |
| ... | ... | |
| 2341 | 2341 |
* |
| 2342 | 2342 |
***************************************/ |
| 2343 | 2343 |
|
| 2344 |
static uint32_t cirrus_linear_readb(void *opaque, a_target_phys_addr addr)
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|
| 2344 |
static uint32_t cirrus_linear_readb(void *opaque, target_phys_addr_t addr)
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|
| 2345 | 2345 |
{
|
| 2346 | 2346 |
CirrusVGAState *s = opaque; |
| 2347 | 2347 |
uint32_t ret; |
| ... | ... | |
| 2369 | 2369 |
return ret; |
| 2370 | 2370 |
} |
| 2371 | 2371 |
|
| 2372 |
static uint32_t cirrus_linear_readw(void *opaque, a_target_phys_addr addr)
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|
| 2372 |
static uint32_t cirrus_linear_readw(void *opaque, target_phys_addr_t addr)
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| 2373 | 2373 |
{
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| 2374 | 2374 |
uint32_t v; |
| 2375 | 2375 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2382 | 2382 |
return v; |
| 2383 | 2383 |
} |
| 2384 | 2384 |
|
| 2385 |
static uint32_t cirrus_linear_readl(void *opaque, a_target_phys_addr addr)
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|
| 2385 |
static uint32_t cirrus_linear_readl(void *opaque, target_phys_addr_t addr)
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|
| 2386 | 2386 |
{
|
| 2387 | 2387 |
uint32_t v; |
| 2388 | 2388 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2399 | 2399 |
return v; |
| 2400 | 2400 |
} |
| 2401 | 2401 |
|
| 2402 |
static void cirrus_linear_writeb(void *opaque, a_target_phys_addr addr,
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| 2402 |
static void cirrus_linear_writeb(void *opaque, target_phys_addr_t addr,
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| 2403 | 2403 |
uint32_t val) |
| 2404 | 2404 |
{
|
| 2405 | 2405 |
CirrusVGAState *s = opaque; |
| ... | ... | |
| 2440 | 2440 |
} |
| 2441 | 2441 |
} |
| 2442 | 2442 |
|
| 2443 |
static void cirrus_linear_writew(void *opaque, a_target_phys_addr addr,
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| 2443 |
static void cirrus_linear_writew(void *opaque, target_phys_addr_t addr,
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| 2444 | 2444 |
uint32_t val) |
| 2445 | 2445 |
{
|
| 2446 | 2446 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2452 | 2452 |
#endif |
| 2453 | 2453 |
} |
| 2454 | 2454 |
|
| 2455 |
static void cirrus_linear_writel(void *opaque, a_target_phys_addr addr,
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| 2455 |
static void cirrus_linear_writel(void *opaque, target_phys_addr_t addr,
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| 2456 | 2456 |
uint32_t val) |
| 2457 | 2457 |
{
|
| 2458 | 2458 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2488 | 2488 |
***************************************/ |
| 2489 | 2489 |
|
| 2490 | 2490 |
|
| 2491 |
static uint32_t cirrus_linear_bitblt_readb(void *opaque, a_target_phys_addr addr)
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|
| 2491 |
static uint32_t cirrus_linear_bitblt_readb(void *opaque, target_phys_addr_t addr)
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|
| 2492 | 2492 |
{
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| 2493 | 2493 |
uint32_t ret; |
| 2494 | 2494 |
|
| ... | ... | |
| 2497 | 2497 |
return ret; |
| 2498 | 2498 |
} |
| 2499 | 2499 |
|
| 2500 |
static uint32_t cirrus_linear_bitblt_readw(void *opaque, a_target_phys_addr addr)
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|
| 2500 |
static uint32_t cirrus_linear_bitblt_readw(void *opaque, target_phys_addr_t addr)
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|
| 2501 | 2501 |
{
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| 2502 | 2502 |
uint32_t v; |
| 2503 | 2503 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2510 | 2510 |
return v; |
| 2511 | 2511 |
} |
| 2512 | 2512 |
|
| 2513 |
static uint32_t cirrus_linear_bitblt_readl(void *opaque, a_target_phys_addr addr)
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|
| 2513 |
static uint32_t cirrus_linear_bitblt_readl(void *opaque, target_phys_addr_t addr)
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|
| 2514 | 2514 |
{
|
| 2515 | 2515 |
uint32_t v; |
| 2516 | 2516 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2527 | 2527 |
return v; |
| 2528 | 2528 |
} |
| 2529 | 2529 |
|
| 2530 |
static void cirrus_linear_bitblt_writeb(void *opaque, a_target_phys_addr addr,
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|
| 2530 |
static void cirrus_linear_bitblt_writeb(void *opaque, target_phys_addr_t addr,
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|
| 2531 | 2531 |
uint32_t val) |
| 2532 | 2532 |
{
|
| 2533 | 2533 |
CirrusVGAState *s = opaque; |
| ... | ... | |
| 2541 | 2541 |
} |
| 2542 | 2542 |
} |
| 2543 | 2543 |
|
| 2544 |
static void cirrus_linear_bitblt_writew(void *opaque, a_target_phys_addr addr,
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|
| 2544 |
static void cirrus_linear_bitblt_writew(void *opaque, target_phys_addr_t addr,
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| 2545 | 2545 |
uint32_t val) |
| 2546 | 2546 |
{
|
| 2547 | 2547 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2553 | 2553 |
#endif |
| 2554 | 2554 |
} |
| 2555 | 2555 |
|
| 2556 |
static void cirrus_linear_bitblt_writel(void *opaque, a_target_phys_addr addr,
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|
| 2556 |
static void cirrus_linear_bitblt_writel(void *opaque, target_phys_addr_t addr,
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|
| 2557 | 2557 |
uint32_t val) |
| 2558 | 2558 |
{
|
| 2559 | 2559 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2855 | 2855 |
* |
| 2856 | 2856 |
***************************************/ |
| 2857 | 2857 |
|
| 2858 |
static uint32_t cirrus_mmio_readb(void *opaque, a_target_phys_addr addr)
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|
| 2858 |
static uint32_t cirrus_mmio_readb(void *opaque, target_phys_addr_t addr)
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|
| 2859 | 2859 |
{
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| 2860 | 2860 |
CirrusVGAState *s = opaque; |
| 2861 | 2861 |
|
| ... | ... | |
| 2868 | 2868 |
} |
| 2869 | 2869 |
} |
| 2870 | 2870 |
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| 2871 |
static uint32_t cirrus_mmio_readw(void *opaque, a_target_phys_addr addr)
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| 2871 |
static uint32_t cirrus_mmio_readw(void *opaque, target_phys_addr_t addr)
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|
| 2872 | 2872 |
{
|
| 2873 | 2873 |
uint32_t v; |
| 2874 | 2874 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2881 | 2881 |
return v; |
| 2882 | 2882 |
} |
| 2883 | 2883 |
|
| 2884 |
static uint32_t cirrus_mmio_readl(void *opaque, a_target_phys_addr addr)
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|
| 2884 |
static uint32_t cirrus_mmio_readl(void *opaque, target_phys_addr_t addr)
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|
| 2885 | 2885 |
{
|
| 2886 | 2886 |
uint32_t v; |
| 2887 | 2887 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2898 | 2898 |
return v; |
| 2899 | 2899 |
} |
| 2900 | 2900 |
|
| 2901 |
static void cirrus_mmio_writeb(void *opaque, a_target_phys_addr addr,
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|
| 2901 |
static void cirrus_mmio_writeb(void *opaque, target_phys_addr_t addr,
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|
| 2902 | 2902 |
uint32_t val) |
| 2903 | 2903 |
{
|
| 2904 | 2904 |
CirrusVGAState *s = opaque; |
| ... | ... | |
| 2912 | 2912 |
} |
| 2913 | 2913 |
} |
| 2914 | 2914 |
|
| 2915 |
static void cirrus_mmio_writew(void *opaque, a_target_phys_addr addr,
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| 2915 |
static void cirrus_mmio_writew(void *opaque, target_phys_addr_t addr,
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| 2916 | 2916 |
uint32_t val) |
| 2917 | 2917 |
{
|
| 2918 | 2918 |
#ifdef TARGET_WORDS_BIGENDIAN |
| ... | ... | |
| 2924 | 2924 |
#endif |
| 2925 | 2925 |
} |
| 2926 | 2926 |
|
| 2927 |
static void cirrus_mmio_writel(void *opaque, a_target_phys_addr addr,
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|
| 2927 |
static void cirrus_mmio_writel(void *opaque, target_phys_addr_t addr,
|
|
| 2928 | 2928 |
uint32_t val) |
| 2929 | 2929 |
{
|
| 2930 | 2930 |
#ifdef TARGET_WORDS_BIGENDIAN |
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