Revision c227f099 hw/gt64xxx.c
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#include "pci.h" |
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#include "pc.h" |
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typedef a_target_phys_addr a_pci_addr;
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typedef target_phys_addr_t pci_addr_t;
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#include "pci_host.h" |
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//#define DEBUG |
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typedef PCIHostState GT64120PCIState; |
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#define PCI_MAPPING_ENTRY(regname) \ |
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a_target_phys_addr regname ##_start; \
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a_target_phys_addr regname ##_length; \
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target_phys_addr_t regname ##_start; \
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target_phys_addr_t regname ##_length; \
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int regname ##_handle |
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typedef struct GT64120State {
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/* Adjust range to avoid touching space which isn't mappable via PCI */ |
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/* XXX: Hardcoded values for Malta: 0x1e000000 - 0x1f100000 |
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0x1fc00000 - 0x1fd00000 */ |
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static void check_reserved_space (a_target_phys_addr *start,
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a_target_phys_addr *length)
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static void check_reserved_space (target_phys_addr_t *start,
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target_phys_addr_t *length)
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{
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a_target_phys_addr begin = *start;
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a_target_phys_addr end = *start + *length;
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target_phys_addr_t begin = *start;
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target_phys_addr_t end = *start + *length;
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if (end >= 0x1e000000LL && end < 0x1f100000LL) |
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end = 0x1e000000LL; |
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static void gt64120_isd_mapping(GT64120State *s) |
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{
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a_target_phys_addr start = s->regs[GT_ISD] << 21;
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a_target_phys_addr length = 0x1000;
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target_phys_addr_t start = s->regs[GT_ISD] << 21;
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target_phys_addr_t length = 0x1000;
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if (s->ISD_length) |
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cpu_register_physical_memory(s->ISD_start, s->ISD_length, |
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} |
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} |
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static void gt64120_writel (void *opaque, a_target_phys_addr addr,
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static void gt64120_writel (void *opaque, target_phys_addr_t addr,
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uint32_t val) |
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{
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GT64120State *s = opaque; |
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} |
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static uint32_t gt64120_readl (void *opaque, |
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a_target_phys_addr addr)
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target_phys_addr_t addr)
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{
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GT64120State *s = opaque; |
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uint32_t val; |
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