/hw/ide/mmio.c - Diff - qemu - Greek Research and Technology Network's projects

Revision c227f099 hw/ide/mmio.c

b/hw/ide/mmio.c
41	41	int shift;
42	42	} MMIOState;
43	43
44		static uint32_t mmio_ide_read (void *opaque, a_target_phys_addr addr)
	44	static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr)
45	45	{
46	46	MMIOState s = (MMIOState)opaque;
47	47	IDEBus *bus = s->bus;
...	...
52	52	return ide_data_readw(bus, 0);
53	53	}
54	54
55		static void mmio_ide_write (void *opaque, a_target_phys_addr addr,
	55	static void mmio_ide_write (void *opaque, target_phys_addr_t addr,
56	56	uint32_t val)
57	57	{
58	58	MMIOState s = (MMIOState)opaque;
...	...
76	76	mmio_ide_write,
77	77	};
78	78
79		static uint32_t mmio_ide_status_read (void *opaque, a_target_phys_addr addr)
	79	static uint32_t mmio_ide_status_read (void *opaque, target_phys_addr_t addr)
80	80	{
81	81	MMIOState s= (MMIOState)opaque;
82	82	IDEBus *bus = s->bus;
83	83	return ide_status_read(bus, 0);
84	84	}
85	85
86		static void mmio_ide_cmd_write (void *opaque, a_target_phys_addr addr,
	86	static void mmio_ide_cmd_write (void *opaque, target_phys_addr_t addr,
87	87	uint32_t val)
88	88	{
89	89	MMIOState s = (MMIOState)opaque;
...	...
122	122	return 0;
123	123	}
124	124
125		void mmio_ide_init (a_target_phys_addr membase, a_target_phys_addr membase2,
	125	void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
126	126	qemu_irq irq, int shift,
127	127	DriveInfo hd0, DriveInfo hd1)
128	128	{

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