Revision c227f099 hw/msix.c
| b/hw/msix.c | ||
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qemu_set_irq(dev->irq[0], 0); |
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} |
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static uint32_t msix_mmio_readl(void *opaque, a_target_phys_addr addr)
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static uint32_t msix_mmio_readl(void *opaque, target_phys_addr_t addr)
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{
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PCIDevice *dev = opaque; |
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unsigned int offset = addr & (dev->msix_page_size - 1); |
| ... | ... | |
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return val; |
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} |
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static uint32_t msix_mmio_read_unallowed(void *opaque, a_target_phys_addr addr)
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static uint32_t msix_mmio_read_unallowed(void *opaque, target_phys_addr_t addr)
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{
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fprintf(stderr, "MSI-X: only dword read is allowed!\n"); |
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return 0; |
| ... | ... | |
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return dev->msix_table_page[offset] & MSIX_VECTOR_MASK; |
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} |
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static void msix_mmio_writel(void *opaque, a_target_phys_addr addr,
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static void msix_mmio_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val) |
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{
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PCIDevice *dev = opaque; |
| ... | ... | |
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} |
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} |
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static void msix_mmio_write_unallowed(void *opaque, a_target_phys_addr addr,
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static void msix_mmio_write_unallowed(void *opaque, target_phys_addr_t addr,
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uint32_t val) |
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{
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fprintf(stderr, "MSI-X: only dword write is allowed!\n"); |
| ... | ... | |
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/* Initialize the MSI-X structures. Note: if MSI-X is supported, BAR size is |
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* modified, it should be retrieved with msix_bar_size. */ |
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int msix_init(struct PCIDevice *dev, unsigned short nentries, |
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unsigned bar_nr, unsigned bar_size, a_target_phys_addr page_size)
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unsigned bar_nr, unsigned bar_size, target_phys_addr_t page_size)
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{
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int ret; |
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/* Nothing to do if MSI is not supported by interrupt controller */ |
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