Revision c227f099 hw/omap_sx1.c
b/hw/omap_sx1.c | ||
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* - 1 RTC |
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*/ |
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static uint32_t static_readb(void *opaque, a_target_phys_addr offset)
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static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
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{ |
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uint32_t *val = (uint32_t *) opaque; |
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return *val >> ((offset & 3) << 3); |
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} |
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static uint32_t static_readh(void *opaque, a_target_phys_addr offset)
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static uint32_t static_readh(void *opaque, target_phys_addr_t offset)
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{ |
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uint32_t *val = (uint32_t *) opaque; |
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return *val >> ((offset & 1) << 3); |
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} |
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static uint32_t static_readw(void *opaque, a_target_phys_addr offset)
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static uint32_t static_readw(void *opaque, target_phys_addr_t offset)
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{ |
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uint32_t *val = (uint32_t *) opaque; |
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return *val >> ((offset & 0) << 3); |
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} |
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static void static_write(void *opaque, a_target_phys_addr offset,
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static void static_write(void *opaque, target_phys_addr_t offset,
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uint32_t value) |
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{ |
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#ifdef SPY |
... | ... | |
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.board_id = 0x265, |
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}; |
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static void sx1_init(a_ram_addr ram_size,
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static void sx1_init(ram_addr_t ram_size,
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const char *boot_device, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename, const char *cpu_model, |
... | ... | |
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static uint32_t cs1val = 0x00215070; |
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static uint32_t cs2val = 0x00001139; |
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static uint32_t cs3val = 0x00001139; |
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a_ram_addr phys_flash;
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ram_addr_t phys_flash;
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DriveInfo *dinfo; |
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int fl_idx; |
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uint32_t flash_size = flash0_size; |
... | ... | |
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//~ qemu_console_resize(ds, 640, 480); |
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} |
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static void sx1_init_v1(a_ram_addr ram_size,
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static void sx1_init_v1(ram_addr_t ram_size,
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const char *boot_device, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename, const char *cpu_model) |
... | ... | |
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kernel_cmdline, initrd_filename, cpu_model, 1); |
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} |
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static void sx1_init_v2(a_ram_addr ram_size,
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static void sx1_init_v2(ram_addr_t ram_size,
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const char *boot_device, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename, const char *cpu_model) |
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