Revision c227f099 hw/pxa2xx_lcd.c
| b/hw/pxa2xx_lcd.c | ||
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| 51 | 51 |
uint8_t bscntr; |
| 52 | 52 |
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struct {
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a_target_phys_addr branch;
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target_phys_addr_t branch;
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int up; |
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uint8_t palette[1024]; |
| 57 | 57 |
uint8_t pbuffer[1024]; |
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void (*redraw)(PXA2xxLCDState *s, a_target_phys_addr addr,
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void (*redraw)(PXA2xxLCDState *s, target_phys_addr_t addr,
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int *miny, int *maxy); |
| 60 | 60 |
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a_target_phys_addr descriptor;
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a_target_phys_addr source;
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target_phys_addr_t descriptor;
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target_phys_addr_t source;
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uint32_t id; |
| 64 | 64 |
uint32_t command; |
| 65 | 65 |
} dma_ch[7]; |
| ... | ... | |
| 284 | 284 |
static void pxa2xx_descriptor_load(PXA2xxLCDState *s) |
| 285 | 285 |
{
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PXAFrameDescriptor desc; |
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a_target_phys_addr descptr;
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target_phys_addr_t descptr;
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int i; |
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for (i = 0; i < PXA_LCDDMA_CHANS; i ++) {
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| ... | ... | |
| 313 | 313 |
} |
| 314 | 314 |
} |
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static uint32_t pxa2xx_lcdc_read(void *opaque, a_target_phys_addr offset)
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static uint32_t pxa2xx_lcdc_read(void *opaque, target_phys_addr_t offset)
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{
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PXA2xxLCDState *s = (PXA2xxLCDState *) opaque; |
| 319 | 319 |
int ch; |
| ... | ... | |
| 407 | 407 |
} |
| 408 | 408 |
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static void pxa2xx_lcdc_write(void *opaque, |
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a_target_phys_addr offset, uint32_t value)
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target_phys_addr_t offset, uint32_t value)
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{
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PXA2xxLCDState *s = (PXA2xxLCDState *) opaque; |
| 413 | 413 |
int ch; |
| ... | ... | |
| 664 | 664 |
} |
| 665 | 665 |
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static void pxa2xx_lcdc_dma0_redraw_horiz(PXA2xxLCDState *s, |
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a_target_phys_addr addr, int *miny, int *maxy)
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target_phys_addr_t addr, int *miny, int *maxy)
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{
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int src_width, dest_width; |
| 670 | 670 |
drawfn fn = NULL; |
| ... | ... | |
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} |
| 692 | 692 |
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static void pxa2xx_lcdc_dma0_redraw_vert(PXA2xxLCDState *s, |
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a_target_phys_addr addr, int *miny, int *maxy)
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target_phys_addr_t addr, int *miny, int *maxy)
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{
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int src_width, dest_width; |
| 697 | 697 |
drawfn fn = NULL; |
| ... | ... | |
| 741 | 741 |
static void pxa2xx_update_display(void *opaque) |
| 742 | 742 |
{
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| 743 | 743 |
PXA2xxLCDState *s = (PXA2xxLCDState *) opaque; |
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a_target_phys_addr fbptr;
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target_phys_addr_t fbptr;
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int miny, maxy; |
| 746 | 746 |
int ch; |
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if (!(s->control[0] & LCCR0_ENB)) |
| ... | ... | |
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#define BITS 32 |
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#include "pxa2xx_template.h" |
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PXA2xxLCDState *pxa2xx_lcdc_init(a_target_phys_addr base, qemu_irq irq)
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PXA2xxLCDState *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq)
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{
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| 922 | 922 |
int iomemtype; |
| 923 | 923 |
PXA2xxLCDState *s; |
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