Archipelago » qemu

#define ESCC_CLOCK 4915200

struct sun4m_hwdef {

    uint32_t ecc_version;

    uint8_t nvram_machine_id;

    uint16_t machine_id;

#define MAX_IOUNITS 5

struct sun4d_hwdef {

    uint8_t nvram_machine_id;

    uint16_t machine_id;

    uint32_t iounit_version;

};

struct sun4c_hwdef {

    uint8_t nvram_machine_id;

    uint16_t machine_id;

    uint32_t iommu_version;

    return 0;

}

                       uint32_t kernel_size,

                       int width, int height, int depth,

                       int nvram_machine_id, const char *arch)

static unsigned long sun4m_load_kernel(const char *kernel_filename,

                                       const char *initrd_filename,

{

    int linux_boot;

    unsigned int i;

    return kernel_size;

}

{

    DeviceState *dev;

    SysBusDevice *s;

    return s;

}

                              void *iommu, qemu_irq *dev_irq)

{

    DeviceState *dev;

    return s;

}

                       void *dma_opaque, qemu_irq irq)

{

    DeviceState *dev;

    qdev_connect_gpio_out(dma_opaque, 0, reset);

}

                                       qemu_irq **parent_irq)

{

    DeviceState *dev;

#define SYS_TIMER_OFFSET      0x10000ULL

#define CPU_TIMER_OFFSET(cpu) (0x1000ULL * cpu)

                                  qemu_irq *cpu_irqs, unsigned int num_cpus)

{

    DeviceState *dev;

    sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);

    for (i = 0; i < MAX_CPUS; i++) {

        sysbus_connect_irq(s, i + 1, cpu_irqs[i]);

    }

}

#define MISC_MDM  0x01b00000

#define MISC_SYS  0x01f00000

                             qemu_irq fdc_tc)

{

    DeviceState *dev;

    qemu_system_powerdown = qdev_get_gpio_in(dev, 0);

}

{

    DeviceState *dev;

    SysBusDevice *s;

    }

}

{

    DeviceState *dev;

    SysBusDevice *s;

    sysbus_connect_irq(s, 0, cpu_halt);

}

                     int height, int depth)

{

    DeviceState *dev;

/* NCR89C100/MACIO Internal ID register */

static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 };

{

    DeviceState *dev;

    SysBusDevice *s;

static int idreg_init1(SysBusDevice *dev)

{

    idreg_offset = qemu_ram_alloc(sizeof(idreg_data));

    sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM);

device_init(idreg_register_devices);

/* Boot PROM (OpenBIOS) */

{

    DeviceState *dev;

    SysBusDevice *s;

static int prom_init1(SysBusDevice *dev)

{

    prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);

    sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);

/* System RAM */

static int ram_init1(SysBusDevice *dev)

{

    RamDevice *d = FROM_SYSBUS(RamDevice, dev);

    RAM_size = d->size;

    return 0;

}

                     uint64_t max_mem)

{

    DeviceState *dev;

    return env;

}

                          const char *boot_device,

                          const char *kernel_filename,

                          const char *kernel_cmdline,

};

/* SPARCstation 5 hardware initialisation */

                     const char *boot_device,

                     const char *kernel_filename, const char *kernel_cmdline,

                     const char *initrd_filename, const char *cpu_model)

}

/* SPARCstation 10 hardware initialisation */

                      const char *boot_device,

                      const char *kernel_filename, const char *kernel_cmdline,

                      const char *initrd_filename, const char *cpu_model)

}

/* SPARCserver 600MP hardware initialisation */

                         const char *boot_device,

                         const char *kernel_filename,

                         const char *kernel_cmdline,

}

/* SPARCstation 20 hardware initialisation */

                      const char *boot_device,

                      const char *kernel_filename, const char *kernel_cmdline,

                      const char *initrd_filename, const char *cpu_model)

}

/* SPARCstation Voyager hardware initialisation */

                      const char *boot_device,

                      const char *kernel_filename, const char *kernel_cmdline,

                      const char *initrd_filename, const char *cpu_model)

}

/* SPARCstation LX hardware initialisation */

                       const char *boot_device,

                       const char *kernel_filename, const char *kernel_cmdline,

                       const char *initrd_filename, const char *cpu_model)

}

/* SPARCstation 4 hardware initialisation */

                     const char *boot_device,

                     const char *kernel_filename, const char *kernel_cmdline,

                     const char *initrd_filename, const char *cpu_model)

}

/* SPARCClassic hardware initialisation */

                      const char *boot_device,

                      const char *kernel_filename, const char *kernel_cmdline,

                      const char *initrd_filename, const char *cpu_model)

}

/* SPARCbook hardware initialisation */

                       const char *boot_device,

                       const char *kernel_filename, const char *kernel_cmdline,

                       const char *initrd_filename, const char *cpu_model)

    },

};

{

    DeviceState *dev;

    SysBusDevice *s;

    return dev;

}

                          const char *boot_device,

                          const char *kernel_filename,

                          const char *kernel_cmdline,

    }

    for (i = 0; i < MAX_IOUNITS; i++)

            iounits[i] = iommu_init(hwdef->iounit_bases[i],

                                    hwdef->iounit_version,

                                    sbi_irq[0]);

}

/* SPARCserver 1000 hardware initialisation */

                        const char *boot_device,

                        const char *kernel_filename, const char *kernel_cmdline,

                        const char *initrd_filename, const char *cpu_model)

}

/* SPARCcenter 2000 hardware initialisation */

                        const char *boot_device,

                        const char *kernel_filename, const char *kernel_cmdline,

                        const char *initrd_filename, const char *cpu_model)

    },

};

                                      qemu_irq *parent_irq)

{

    DeviceState *dev;

    return dev;

}

                          const char *boot_device,

                          const char *kernel_filename,

                          const char *kernel_cmdline,

    slavio_misc_init(0, hwdef->aux1_base, 0, slavio_irq[1], fdc_tc);

        /* there is zero or one floppy drive */

        memset(fd, 0, sizeof(fd));

        dinfo = drive_get(IF_FLOPPY, 0, 0);

}

/* SPARCstation 2 hardware initialisation */

                     const char *boot_device,

                     const char *kernel_filename, const char *kernel_cmdline,

                     const char *initrd_filename, const char *cpu_model)