Revision c227f099 hw/tc6393xb.c
| b/hw/tc6393xb.c | ||
|---|---|---|
| 122 | 122 |
ECCState ecc; |
| 123 | 123 |
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| 124 | 124 |
DisplayState *ds; |
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a_ram_addr vram_addr;
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ram_addr_t vram_addr;
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| 126 | 126 |
uint16_t *vram_ptr; |
| 127 | 127 |
uint32_t scr_width, scr_height; /* in pixels */ |
| 128 | 128 |
qemu_irq l3v; |
| ... | ... | |
| 211 | 211 |
case SCR_ ##N(1): return s->scr.N[1]; \ |
| 212 | 212 |
case SCR_ ##N(2): return s->scr.N[2] |
| 213 | 213 |
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static uint32_t tc6393xb_scr_readb(TC6393xbState *s, a_target_phys_addr addr)
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static uint32_t tc6393xb_scr_readb(TC6393xbState *s, target_phys_addr_t addr)
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{
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switch (addr) {
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| 217 | 217 |
case SCR_REVID: |
| ... | ... | |
| 272 | 272 |
case SCR_ ##N(1): s->scr.N[1] = value; return; \ |
| 273 | 273 |
case SCR_ ##N(2): s->scr.N[2] = value; return |
| 274 | 274 |
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static void tc6393xb_scr_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value)
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static void tc6393xb_scr_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value)
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{
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switch (addr) {
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| 278 | 278 |
SCR_REG_B(ISR); |
| ... | ... | |
| 323 | 323 |
(s->nand.imr & 0x80) && (s->nand.imr & s->nand.isr)); |
| 324 | 324 |
} |
| 325 | 325 |
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static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, a_target_phys_addr addr) {
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static uint32_t tc6393xb_nand_cfg_readb(TC6393xbState *s, target_phys_addr_t addr) {
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| 327 | 327 |
switch (addr) {
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| 328 | 328 |
case NAND_CFG_COMMAND: |
| 329 | 329 |
return s->nand_enable ? 2 : 0; |
| ... | ... | |
| 336 | 336 |
fprintf(stderr, "tc6393xb_nand_cfg: unhandled read at %08x\n", (uint32_t) addr); |
| 337 | 337 |
return 0; |
| 338 | 338 |
} |
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static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value) {
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static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
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| 340 | 340 |
switch (addr) {
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| 341 | 341 |
case NAND_CFG_COMMAND: |
| 342 | 342 |
s->nand_enable = (value & 0x2); |
| ... | ... | |
| 353 | 353 |
(uint32_t) addr, value & 0xff); |
| 354 | 354 |
} |
| 355 | 355 |
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static uint32_t tc6393xb_nand_readb(TC6393xbState *s, a_target_phys_addr addr) {
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static uint32_t tc6393xb_nand_readb(TC6393xbState *s, target_phys_addr_t addr) {
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| 357 | 357 |
switch (addr) {
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| 358 | 358 |
case NAND_DATA + 0: |
| 359 | 359 |
case NAND_DATA + 1: |
| ... | ... | |
| 372 | 372 |
fprintf(stderr, "tc6393xb_nand: unhandled read at %08x\n", (uint32_t) addr); |
| 373 | 373 |
return 0; |
| 374 | 374 |
} |
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static void tc6393xb_nand_writeb(TC6393xbState *s, a_target_phys_addr addr, uint32_t value) {
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static void tc6393xb_nand_writeb(TC6393xbState *s, target_phys_addr_t addr, uint32_t value) {
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// fprintf(stderr, "tc6393xb_nand: write at %08x: %02x\n", |
| 377 | 377 |
// (uint32_t) addr, value & 0xff); |
| 378 | 378 |
switch (addr) {
|
| ... | ... | |
| 495 | 495 |
} |
| 496 | 496 |
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| 497 | 497 |
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static uint32_t tc6393xb_readb(void *opaque, a_target_phys_addr addr) {
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static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
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| 499 | 499 |
TC6393xbState *s = opaque; |
| 500 | 500 |
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| 501 | 501 |
switch (addr >> 8) {
|
| ... | ... | |
| 516 | 516 |
return 0; |
| 517 | 517 |
} |
| 518 | 518 |
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static void tc6393xb_writeb(void *opaque, a_target_phys_addr addr, uint32_t value) {
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static void tc6393xb_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) {
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| 520 | 520 |
TC6393xbState *s = opaque; |
| 521 | 521 |
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| 522 | 522 |
switch (addr >> 8) {
|
| ... | ... | |
| 535 | 535 |
(uint32_t) addr, value & 0xff); |
| 536 | 536 |
} |
| 537 | 537 |
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static uint32_t tc6393xb_readw(void *opaque, a_target_phys_addr addr)
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static uint32_t tc6393xb_readw(void *opaque, target_phys_addr_t addr)
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{
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return (tc6393xb_readb(opaque, addr) & 0xff) | |
| 541 | 541 |
(tc6393xb_readb(opaque, addr + 1) << 8); |
| 542 | 542 |
} |
| 543 | 543 |
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static uint32_t tc6393xb_readl(void *opaque, a_target_phys_addr addr)
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static uint32_t tc6393xb_readl(void *opaque, target_phys_addr_t addr)
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| 545 | 545 |
{
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| 546 | 546 |
return (tc6393xb_readb(opaque, addr) & 0xff) | |
| 547 | 547 |
((tc6393xb_readb(opaque, addr + 1) & 0xff) << 8) | |
| ... | ... | |
| 549 | 549 |
((tc6393xb_readb(opaque, addr + 3) & 0xff) << 24); |
| 550 | 550 |
} |
| 551 | 551 |
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static void tc6393xb_writew(void *opaque, a_target_phys_addr addr, uint32_t value)
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static void tc6393xb_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
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| 553 | 553 |
{
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| 554 | 554 |
tc6393xb_writeb(opaque, addr, value); |
| 555 | 555 |
tc6393xb_writeb(opaque, addr + 1, value >> 8); |
| 556 | 556 |
} |
| 557 | 557 |
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static void tc6393xb_writel(void *opaque, a_target_phys_addr addr, uint32_t value)
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static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t value)
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| 559 | 559 |
{
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| 560 | 560 |
tc6393xb_writeb(opaque, addr, value); |
| 561 | 561 |
tc6393xb_writeb(opaque, addr + 1, value >> 8); |
Also available in: Unified diff