Revision c227f099 hw/versatile_pci.c
b/hw/versatile_pci.c | ||
---|---|---|
17 | 17 |
int mem_config; |
18 | 18 |
} PCIVPBState; |
19 | 19 |
|
20 |
static inline uint32_t vpb_pci_config_addr(a_target_phys_addr addr)
|
|
20 |
static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)
|
|
21 | 21 |
{ |
22 | 22 |
return addr & 0xffffff; |
23 | 23 |
} |
24 | 24 |
|
25 |
static void pci_vpb_config_writeb (void *opaque, a_target_phys_addr addr,
|
|
25 |
static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,
|
|
26 | 26 |
uint32_t val) |
27 | 27 |
{ |
28 | 28 |
pci_data_write(opaque, vpb_pci_config_addr (addr), val, 1); |
29 | 29 |
} |
30 | 30 |
|
31 |
static void pci_vpb_config_writew (void *opaque, a_target_phys_addr addr,
|
|
31 |
static void pci_vpb_config_writew (void *opaque, target_phys_addr_t addr,
|
|
32 | 32 |
uint32_t val) |
33 | 33 |
{ |
34 | 34 |
#ifdef TARGET_WORDS_BIGENDIAN |
... | ... | |
37 | 37 |
pci_data_write(opaque, vpb_pci_config_addr (addr), val, 2); |
38 | 38 |
} |
39 | 39 |
|
40 |
static void pci_vpb_config_writel (void *opaque, a_target_phys_addr addr,
|
|
40 |
static void pci_vpb_config_writel (void *opaque, target_phys_addr_t addr,
|
|
41 | 41 |
uint32_t val) |
42 | 42 |
{ |
43 | 43 |
#ifdef TARGET_WORDS_BIGENDIAN |
... | ... | |
46 | 46 |
pci_data_write(opaque, vpb_pci_config_addr (addr), val, 4); |
47 | 47 |
} |
48 | 48 |
|
49 |
static uint32_t pci_vpb_config_readb (void *opaque, a_target_phys_addr addr)
|
|
49 |
static uint32_t pci_vpb_config_readb (void *opaque, target_phys_addr_t addr)
|
|
50 | 50 |
{ |
51 | 51 |
uint32_t val; |
52 | 52 |
val = pci_data_read(opaque, vpb_pci_config_addr (addr), 1); |
53 | 53 |
return val; |
54 | 54 |
} |
55 | 55 |
|
56 |
static uint32_t pci_vpb_config_readw (void *opaque, a_target_phys_addr addr)
|
|
56 |
static uint32_t pci_vpb_config_readw (void *opaque, target_phys_addr_t addr)
|
|
57 | 57 |
{ |
58 | 58 |
uint32_t val; |
59 | 59 |
val = pci_data_read(opaque, vpb_pci_config_addr (addr), 2); |
... | ... | |
63 | 63 |
return val; |
64 | 64 |
} |
65 | 65 |
|
66 |
static uint32_t pci_vpb_config_readl (void *opaque, a_target_phys_addr addr)
|
|
66 |
static uint32_t pci_vpb_config_readl (void *opaque, target_phys_addr_t addr)
|
|
67 | 67 |
{ |
68 | 68 |
uint32_t val; |
69 | 69 |
val = pci_data_read(opaque, vpb_pci_config_addr (addr), 4); |
... | ... | |
97 | 97 |
qemu_set_irq(pic[irq_num], level); |
98 | 98 |
} |
99 | 99 |
|
100 |
static void pci_vpb_map(SysBusDevice *dev, a_target_phys_addr base)
|
|
100 |
static void pci_vpb_map(SysBusDevice *dev, target_phys_addr_t base)
|
|
101 | 101 |
{ |
102 | 102 |
PCIVPBState *s = (PCIVPBState *)dev; |
103 | 103 |
/* Selfconfig area. */ |
Also available in: Unified diff