Revision c227f099 target-sparc/helper.c
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/* thread support */ |
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static a_spinlock global_cpu_lock = SPIN_LOCK_UNLOCKED;
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static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
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void cpu_lock(void) |
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{
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} |
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}; |
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static int get_physical_address(CPUState *env, a_target_phys_addr *physical,
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static int get_physical_address(CPUState *env, target_phys_addr_t *physical,
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int *prot, int *access_index, |
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target_ulong address, int rw, int mmu_idx) |
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{
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int access_perms = 0; |
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a_target_phys_addr pde_ptr;
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target_phys_addr_t pde_ptr;
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uint32_t pde; |
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target_ulong virt_addr; |
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int error_code = 0, is_dirty, is_user; |
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/* Even if large ptes, we map only one 4KB page in the cache to |
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avoid filling it too fast */ |
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*physical = ((a_target_phys_addr)(pde & PTE_ADDR_MASK) << 4) + page_offset;
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*physical = ((target_phys_addr_t)(pde & PTE_ADDR_MASK) << 4) + page_offset;
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return error_code; |
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} |
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int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
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int mmu_idx, int is_softmmu) |
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{
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a_target_phys_addr paddr;
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target_phys_addr_t paddr;
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target_ulong vaddr; |
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int error_code = 0, prot, ret = 0, access_index; |
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target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) |
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{
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a_target_phys_addr pde_ptr;
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target_phys_addr_t pde_ptr;
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uint32_t pde; |
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/* Context base + context number */ |
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pde_ptr = (a_target_phys_addr)(env->mmuregs[1] << 4) +
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pde_ptr = (target_phys_addr_t)(env->mmuregs[1] << 4) +
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(env->mmuregs[2] << 2); |
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pde = ldl_phys(pde_ptr); |
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{
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target_ulong va, va1, va2; |
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unsigned int n, m, o; |
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a_target_phys_addr pde_ptr, pa;
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target_phys_addr_t pde_ptr, pa;
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uint32_t pde; |
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printf("MMU dump:\n");
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pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); |
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pde = ldl_phys(pde_ptr); |
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printf("Root ptr: " TARGET_FMT_plx ", ctx: %d\n",
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(a_target_phys_addr)env->mmuregs[1] << 4, env->mmuregs[2]);
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(target_phys_addr_t)env->mmuregs[1] << 4, env->mmuregs[2]);
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for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
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pde = mmu_probe(env, va, 2); |
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if (pde) {
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#else /* !TARGET_SPARC64 */ |
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// 41 bit physical address space |
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static inline a_target_phys_addr ultrasparc_truncate_physical(uint64_t x)
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static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
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{
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return x & 0x1ffffffffffULL; |
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} |
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// requires virtual address mask value calculated from TTE entry size |
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static inline int ultrasparc_tag_match(SparcTLBEntry *tlb, |
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uint64_t address, uint64_t context, |
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a_target_phys_addr *physical)
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target_phys_addr_t *physical)
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{
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uint64_t mask; |
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|
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} |
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static int get_physical_address_data(CPUState *env, |
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a_target_phys_addr *physical, int *prot,
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target_phys_addr_t *physical, int *prot,
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target_ulong address, int rw, int is_user) |
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{
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unsigned int i; |
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} |
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static int get_physical_address_code(CPUState *env, |
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a_target_phys_addr *physical, int *prot,
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target_phys_addr_t *physical, int *prot,
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target_ulong address, int is_user) |
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{
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unsigned int i; |
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return 1; |
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} |
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static int get_physical_address(CPUState *env, a_target_phys_addr *physical,
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static int get_physical_address(CPUState *env, target_phys_addr_t *physical,
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int *prot, int *access_index, |
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target_ulong address, int rw, int mmu_idx) |
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{
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int mmu_idx, int is_softmmu) |
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{
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target_ulong virt_addr, vaddr; |
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a_target_phys_addr paddr;
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target_phys_addr_t paddr;
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int error_code = 0, prot, ret = 0, access_index; |
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error_code = get_physical_address(env, &paddr, &prot, &access_index, |
| ... | ... | |
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#if defined(CONFIG_USER_ONLY) |
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a_target_phys_addr cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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return addr; |
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} |
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#else |
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a_target_phys_addr cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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a_target_phys_addr phys_addr;
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target_phys_addr_t phys_addr;
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int prot, access_index; |
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if (get_physical_address(env, &phys_addr, &prot, &access_index, addr, 2, |
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