Revision c29b735c

b/target-ppc/cpu.h
642 642
    powerpc_input_t bus_model;
643 643
    int bfd_mach;
644 644
    uint32_t flags;
645
    uint64_t insns_flags;
645 646

  
646 647
    int error_code;
647 648
    uint32_t pending_interrupts;
......
1320 1321
#define SPR_E500_SVR          (0x3FF)
1321 1322

  
1322 1323
/*****************************************************************************/
1324
/* PowerPC Instructions types definitions                                    */
1325
enum {
1326
    PPC_NONE           = 0x0000000000000000ULL,
1327
    /* PowerPC base instructions set                                         */
1328
    PPC_INSNS_BASE     = 0x0000000000000001ULL,
1329
    /*   integer operations instructions                                     */
1330
#define PPC_INTEGER PPC_INSNS_BASE
1331
    /*   flow control instructions                                           */
1332
#define PPC_FLOW    PPC_INSNS_BASE
1333
    /*   virtual memory instructions                                         */
1334
#define PPC_MEM     PPC_INSNS_BASE
1335
    /*   ld/st with reservation instructions                                 */
1336
#define PPC_RES     PPC_INSNS_BASE
1337
    /*   spr/msr access instructions                                         */
1338
#define PPC_MISC    PPC_INSNS_BASE
1339
    /* Deprecated instruction sets                                           */
1340
    /*   Original POWER instruction set                                      */
1341
    PPC_POWER          = 0x0000000000000002ULL,
1342
    /*   POWER2 instruction set extension                                    */
1343
    PPC_POWER2         = 0x0000000000000004ULL,
1344
    /*   Power RTC support                                                   */
1345
    PPC_POWER_RTC      = 0x0000000000000008ULL,
1346
    /*   Power-to-PowerPC bridge (601)                                       */
1347
    PPC_POWER_BR       = 0x0000000000000010ULL,
1348
    /* 64 bits PowerPC instruction set                                       */
1349
    PPC_64B            = 0x0000000000000020ULL,
1350
    /*   New 64 bits extensions (PowerPC 2.0x)                               */
1351
    PPC_64BX           = 0x0000000000000040ULL,
1352
    /*   64 bits hypervisor extensions                                       */
1353
    PPC_64H            = 0x0000000000000080ULL,
1354
    /*   New wait instruction (PowerPC 2.0x)                                 */
1355
    PPC_WAIT           = 0x0000000000000100ULL,
1356
    /*   Time base mftb instruction                                          */
1357
    PPC_MFTB           = 0x0000000000000200ULL,
1358

  
1359
    /* Fixed-point unit extensions                                           */
1360
    /*   PowerPC 602 specific                                                */
1361
    PPC_602_SPEC       = 0x0000000000000400ULL,
1362
    /*   isel instruction                                                    */
1363
    PPC_ISEL           = 0x0000000000000800ULL,
1364
    /*   popcntb instruction                                                 */
1365
    PPC_POPCNTB        = 0x0000000000001000ULL,
1366
    /*   string load / store                                                 */
1367
    PPC_STRING         = 0x0000000000002000ULL,
1368

  
1369
    /* Floating-point unit extensions                                        */
1370
    /*   Optional floating point instructions                                */
1371
    PPC_FLOAT          = 0x0000000000010000ULL,
1372
    /* New floating-point extensions (PowerPC 2.0x)                          */
1373
    PPC_FLOAT_EXT      = 0x0000000000020000ULL,
1374
    PPC_FLOAT_FSQRT    = 0x0000000000040000ULL,
1375
    PPC_FLOAT_FRES     = 0x0000000000080000ULL,
1376
    PPC_FLOAT_FRSQRTE  = 0x0000000000100000ULL,
1377
    PPC_FLOAT_FRSQRTES = 0x0000000000200000ULL,
1378
    PPC_FLOAT_FSEL     = 0x0000000000400000ULL,
1379
    PPC_FLOAT_STFIWX   = 0x0000000000800000ULL,
1380

  
1381
    /* Vector/SIMD extensions                                                */
1382
    /*   Altivec support                                                     */
1383
    PPC_ALTIVEC        = 0x0000000001000000ULL,
1384
    /*   PowerPC 2.03 SPE extension                                          */
1385
    PPC_SPE            = 0x0000000002000000ULL,
1386
    /*   PowerPC 2.03 SPE single-precision floating-point extension          */
1387
    PPC_SPE_SINGLE     = 0x0000000004000000ULL,
1388
    /*   PowerPC 2.03 SPE double-precision floating-point extension          */
1389
    PPC_SPE_DOUBLE     = 0x0000000008000000ULL,
1390

  
1391
    /* Optional memory control instructions                                  */
1392
    PPC_MEM_TLBIA      = 0x0000000010000000ULL,
1393
    PPC_MEM_TLBIE      = 0x0000000020000000ULL,
1394
    PPC_MEM_TLBSYNC    = 0x0000000040000000ULL,
1395
    /*   sync instruction                                                    */
1396
    PPC_MEM_SYNC       = 0x0000000080000000ULL,
1397
    /*   eieio instruction                                                   */
1398
    PPC_MEM_EIEIO      = 0x0000000100000000ULL,
1399

  
1400
    /* Cache control instructions                                            */
1401
    PPC_CACHE          = 0x0000000200000000ULL,
1402
    /*   icbi instruction                                                    */
1403
    PPC_CACHE_ICBI     = 0x0000000400000000ULL,
1404
    /*   dcbz instruction with fixed cache line size                         */
1405
    PPC_CACHE_DCBZ     = 0x0000000800000000ULL,
1406
    /*   dcbz instruction with tunable cache line size                       */
1407
    PPC_CACHE_DCBZT    = 0x0000001000000000ULL,
1408
    /*   dcba instruction                                                    */
1409
    PPC_CACHE_DCBA     = 0x0000002000000000ULL,
1410
    /*   Freescale cache locking instructions                                */
1411
    PPC_CACHE_LOCK     = 0x0000004000000000ULL,
1412

  
1413
    /* MMU related extensions                                                */
1414
    /*   external control instructions                                       */
1415
    PPC_EXTERN         = 0x0000010000000000ULL,
1416
    /*   segment register access instructions                                */
1417
    PPC_SEGMENT        = 0x0000020000000000ULL,
1418
    /*   PowerPC 6xx TLB management instructions                             */
1419
    PPC_6xx_TLB        = 0x0000040000000000ULL,
1420
    /* PowerPC 74xx TLB management instructions                              */
1421
    PPC_74xx_TLB       = 0x0000080000000000ULL,
1422
    /*   PowerPC 40x TLB management instructions                             */
1423
    PPC_40x_TLB        = 0x0000100000000000ULL,
1424
    /*   segment register access instructions for PowerPC 64 "bridge"        */
1425
    PPC_SEGMENT_64B    = 0x0000200000000000ULL,
1426
    /*   SLB management                                                      */
1427
    PPC_SLBI           = 0x0000400000000000ULL,
1428

  
1429
    /* Embedded PowerPC dedicated instructions                               */
1430
    PPC_WRTEE          = 0x0001000000000000ULL,
1431
    /* PowerPC 40x exception model                                           */
1432
    PPC_40x_EXCP       = 0x0002000000000000ULL,
1433
    /* PowerPC 405 Mac instructions                                          */
1434
    PPC_405_MAC        = 0x0004000000000000ULL,
1435
    /* PowerPC 440 specific instructions                                     */
1436
    PPC_440_SPEC       = 0x0008000000000000ULL,
1437
    /* BookE (embedded) PowerPC specification                                */
1438
    PPC_BOOKE          = 0x0010000000000000ULL,
1439
    /* mfapidi instruction                                                   */
1440
    PPC_MFAPIDI        = 0x0020000000000000ULL,
1441
    /* tlbiva instruction                                                    */
1442
    PPC_TLBIVA         = 0x0040000000000000ULL,
1443
    /* tlbivax instruction                                                   */
1444
    PPC_TLBIVAX        = 0x0080000000000000ULL,
1445
    /* PowerPC 4xx dedicated instructions                                    */
1446
    PPC_4xx_COMMON     = 0x0100000000000000ULL,
1447
    /* PowerPC 40x ibct instructions                                         */
1448
    PPC_40x_ICBT       = 0x0200000000000000ULL,
1449
    /* rfmci is not implemented in all BookE PowerPC                         */
1450
    PPC_RFMCI          = 0x0400000000000000ULL,
1451
    /* rfdi instruction                                                      */
1452
    PPC_RFDI           = 0x0800000000000000ULL,
1453
    /* DCR accesses                                                          */
1454
    PPC_DCR            = 0x1000000000000000ULL,
1455
    /* DCR extended accesse                                                  */
1456
    PPC_DCRX           = 0x2000000000000000ULL,
1457
    /* user-mode DCR access, implemented in PowerPC 460                      */
1458
    PPC_DCRUX          = 0x4000000000000000ULL,
1459
};
1460

  
1461
/*****************************************************************************/
1323 1462
/* Memory access type :
1324 1463
 * may be needed for precise access rights control and precise exceptions.
1325 1464
 */
b/target-ppc/translate.c
457 457
}
458 458

  
459 459
/*****************************************************************************/
460
/* PowerPC Instructions types definitions                                    */
461
enum {
462
    PPC_NONE           = 0x0000000000000000ULL,
463
    /* PowerPC base instructions set                                         */
464
    PPC_INSNS_BASE     = 0x0000000000000001ULL,
465
    /*   integer operations instructions                                     */
466
#define PPC_INTEGER PPC_INSNS_BASE
467
    /*   flow control instructions                                           */
468
#define PPC_FLOW    PPC_INSNS_BASE
469
    /*   virtual memory instructions                                         */
470
#define PPC_MEM     PPC_INSNS_BASE
471
    /*   ld/st with reservation instructions                                 */
472
#define PPC_RES     PPC_INSNS_BASE
473
    /*   spr/msr access instructions                                         */
474
#define PPC_MISC    PPC_INSNS_BASE
475
    /* Deprecated instruction sets                                           */
476
    /*   Original POWER instruction set                                      */
477
    PPC_POWER          = 0x0000000000000002ULL,
478
    /*   POWER2 instruction set extension                                    */
479
    PPC_POWER2         = 0x0000000000000004ULL,
480
    /*   Power RTC support                                                   */
481
    PPC_POWER_RTC      = 0x0000000000000008ULL,
482
    /*   Power-to-PowerPC bridge (601)                                       */
483
    PPC_POWER_BR       = 0x0000000000000010ULL,
484
    /* 64 bits PowerPC instruction set                                       */
485
    PPC_64B            = 0x0000000000000020ULL,
486
    /*   New 64 bits extensions (PowerPC 2.0x)                               */
487
    PPC_64BX           = 0x0000000000000040ULL,
488
    /*   64 bits hypervisor extensions                                       */
489
    PPC_64H            = 0x0000000000000080ULL,
490
    /*   New wait instruction (PowerPC 2.0x)                                 */
491
    PPC_WAIT           = 0x0000000000000100ULL,
492
    /*   Time base mftb instruction                                          */
493
    PPC_MFTB           = 0x0000000000000200ULL,
494

  
495
    /* Fixed-point unit extensions                                           */
496
    /*   PowerPC 602 specific                                                */
497
    PPC_602_SPEC       = 0x0000000000000400ULL,
498
    /*   isel instruction                                                    */
499
    PPC_ISEL           = 0x0000000000000800ULL,
500
    /*   popcntb instruction                                                 */
501
    PPC_POPCNTB        = 0x0000000000001000ULL,
502
    /*   string load / store                                                 */
503
    PPC_STRING         = 0x0000000000002000ULL,
504

  
505
    /* Floating-point unit extensions                                        */
506
    /*   Optional floating point instructions                                */
507
    PPC_FLOAT          = 0x0000000000010000ULL,
508
    /* New floating-point extensions (PowerPC 2.0x)                          */
509
    PPC_FLOAT_EXT      = 0x0000000000020000ULL,
510
    PPC_FLOAT_FSQRT    = 0x0000000000040000ULL,
511
    PPC_FLOAT_FRES     = 0x0000000000080000ULL,
512
    PPC_FLOAT_FRSQRTE  = 0x0000000000100000ULL,
513
    PPC_FLOAT_FRSQRTES = 0x0000000000200000ULL,
514
    PPC_FLOAT_FSEL     = 0x0000000000400000ULL,
515
    PPC_FLOAT_STFIWX   = 0x0000000000800000ULL,
516

  
517
    /* Vector/SIMD extensions                                                */
518
    /*   Altivec support                                                     */
519
    PPC_ALTIVEC        = 0x0000000001000000ULL,
520
    /*   PowerPC 2.03 SPE extension                                          */
521
    PPC_SPE            = 0x0000000002000000ULL,
522
    /*   PowerPC 2.03 SPE single-precision floating-point extension          */
523
    PPC_SPE_SINGLE     = 0x0000000004000000ULL,
524
    /*   PowerPC 2.03 SPE double-precision floating-point extension          */
525
    PPC_SPE_DOUBLE     = 0x0000000008000000ULL,
526

  
527
    /* Optional memory control instructions                                  */
528
    PPC_MEM_TLBIA      = 0x0000000010000000ULL,
529
    PPC_MEM_TLBIE      = 0x0000000020000000ULL,
530
    PPC_MEM_TLBSYNC    = 0x0000000040000000ULL,
531
    /*   sync instruction                                                    */
532
    PPC_MEM_SYNC       = 0x0000000080000000ULL,
533
    /*   eieio instruction                                                   */
534
    PPC_MEM_EIEIO      = 0x0000000100000000ULL,
535

  
536
    /* Cache control instructions                                            */
537
    PPC_CACHE          = 0x0000000200000000ULL,
538
    /*   icbi instruction                                                    */
539
    PPC_CACHE_ICBI     = 0x0000000400000000ULL,
540
    /*   dcbz instruction with fixed cache line size                         */
541
    PPC_CACHE_DCBZ     = 0x0000000800000000ULL,
542
    /*   dcbz instruction with tunable cache line size                       */
543
    PPC_CACHE_DCBZT    = 0x0000001000000000ULL,
544
    /*   dcba instruction                                                    */
545
    PPC_CACHE_DCBA     = 0x0000002000000000ULL,
546
    /*   Freescale cache locking instructions                                */
547
    PPC_CACHE_LOCK     = 0x0000004000000000ULL,
548

  
549
    /* MMU related extensions                                                */
550
    /*   external control instructions                                       */
551
    PPC_EXTERN         = 0x0000010000000000ULL,
552
    /*   segment register access instructions                                */
553
    PPC_SEGMENT        = 0x0000020000000000ULL,
554
    /*   PowerPC 6xx TLB management instructions                             */
555
    PPC_6xx_TLB        = 0x0000040000000000ULL,
556
    /* PowerPC 74xx TLB management instructions                              */
557
    PPC_74xx_TLB       = 0x0000080000000000ULL,
558
    /*   PowerPC 40x TLB management instructions                             */
559
    PPC_40x_TLB        = 0x0000100000000000ULL,
560
    /*   segment register access instructions for PowerPC 64 "bridge"        */
561
    PPC_SEGMENT_64B    = 0x0000200000000000ULL,
562
    /*   SLB management                                                      */
563
    PPC_SLBI           = 0x0000400000000000ULL,
564

  
565
    /* Embedded PowerPC dedicated instructions                               */
566
    PPC_WRTEE          = 0x0001000000000000ULL,
567
    /* PowerPC 40x exception model                                           */
568
    PPC_40x_EXCP       = 0x0002000000000000ULL,
569
    /* PowerPC 405 Mac instructions                                          */
570
    PPC_405_MAC        = 0x0004000000000000ULL,
571
    /* PowerPC 440 specific instructions                                     */
572
    PPC_440_SPEC       = 0x0008000000000000ULL,
573
    /* BookE (embedded) PowerPC specification                                */
574
    PPC_BOOKE          = 0x0010000000000000ULL,
575
    /* mfapidi instruction                                                   */
576
    PPC_MFAPIDI        = 0x0020000000000000ULL,
577
    /* tlbiva instruction                                                    */
578
    PPC_TLBIVA         = 0x0040000000000000ULL,
579
    /* tlbivax instruction                                                   */
580
    PPC_TLBIVAX        = 0x0080000000000000ULL,
581
    /* PowerPC 4xx dedicated instructions                                    */
582
    PPC_4xx_COMMON     = 0x0100000000000000ULL,
583
    /* PowerPC 40x ibct instructions                                         */
584
    PPC_40x_ICBT       = 0x0200000000000000ULL,
585
    /* rfmci is not implemented in all BookE PowerPC                         */
586
    PPC_RFMCI          = 0x0400000000000000ULL,
587
    /* rfdi instruction                                                      */
588
    PPC_RFDI           = 0x0800000000000000ULL,
589
    /* DCR accesses                                                          */
590
    PPC_DCR            = 0x1000000000000000ULL,
591
    /* DCR extended accesse                                                  */
592
    PPC_DCRX           = 0x2000000000000000ULL,
593
    /* user-mode DCR access, implemented in PowerPC 460                      */
594
    PPC_DCRUX          = 0x4000000000000000ULL,
595
};
596

  
597
/*****************************************************************************/
598 460
/* PowerPC instructions table                                                */
599 461
#if HOST_LONG_BITS == 64
600 462
#define OPC_ALIGN 8
b/target-ppc/translate_init.c
9483 9483
    env->mmu_model = def->mmu_model;
9484 9484
    env->excp_model = def->excp_model;
9485 9485
    env->bus_model = def->bus_model;
9486
    env->insns_flags = def->insns_flags;
9486 9487
    env->flags = def->flags;
9487 9488
    env->bfd_mach = def->bfd_mach;
9488 9489
    env->check_pow = def->check_pow;

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