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/*
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 *  Host code generation
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include <stdarg.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "config.h"
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#define NO_CPU_IO_DEFS
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#include "cpu.h"
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#include "exec-all.h"
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#include "disas.h"
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enum {
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#define DEF(s, n, copy_size) INDEX_op_ ## s,
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#include "opc.h"
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#undef DEF
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    NB_OPS,
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};
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#include "dyngen.h"
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#include "op.h"
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uint16_t gen_opc_buf[OPC_BUF_SIZE];
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uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
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long gen_labels[OPC_BUF_SIZE];
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int nb_gen_labels;
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target_ulong gen_opc_pc[OPC_BUF_SIZE];
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uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
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#if defined(TARGET_I386)
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uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
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#elif defined(TARGET_SPARC)
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target_ulong gen_opc_npc[OPC_BUF_SIZE];
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#endif
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int code_copy_enabled = 1;
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#ifdef DEBUG_DISAS
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static const char *op_str[] = {
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#define DEF(s, n, copy_size) #s,
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#include "opc.h"
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#undef DEF
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};
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static uint8_t op_nb_args[] = {
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#define DEF(s, n, copy_size) n,
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#include "opc.h"
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#undef DEF
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};
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static const unsigned short opc_copy_size[] = {
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#define DEF(s, n, copy_size) copy_size,
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#include "opc.h"
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#undef DEF
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};
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void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
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{
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    const uint16_t *opc_ptr;
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    const uint32_t *opparam_ptr;
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    int c, n, i;
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    opc_ptr = opc_buf;
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    opparam_ptr = opparam_buf;
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    for(;;) {
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        c = *opc_ptr++;
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        n = op_nb_args[c];
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        fprintf(logfile, "0x%04x: %s", 
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                (int)(opc_ptr - opc_buf - 1), op_str[c]);
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        for(i = 0; i < n; i++) {
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            fprintf(logfile, " 0x%x", opparam_ptr[i]);
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        }
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        fprintf(logfile, "\n");
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        if (c == INDEX_op_end)
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            break;
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        opparam_ptr += n;
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    }
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}
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#endif
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/* compute label info */
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static void dyngen_labels(long *gen_labels, int nb_gen_labels,
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                          uint8_t *gen_code_buf, const uint16_t *opc_buf)
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{
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    uint8_t *gen_code_ptr;
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    int c, i;
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    unsigned long gen_code_addr[OPC_BUF_SIZE];
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    if (nb_gen_labels == 0)
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        return;
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    /* compute the address of each op code */
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    gen_code_ptr = gen_code_buf;
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    i = 0;
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    for(;;) {
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        c = opc_buf[i];
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        gen_code_addr[i] =(unsigned long)gen_code_ptr;
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        if (c == INDEX_op_end)
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            break;
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        gen_code_ptr += opc_copy_size[c];
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        i++;
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    }
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    /* compute the address of each label */
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    for(i = 0; i < nb_gen_labels; i++) {
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        gen_labels[i] = gen_code_addr[gen_labels[i]];
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    }
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}
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/* return non zero if the very first instruction is invalid so that
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   the virtual CPU can trigger an exception. 
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   '*gen_code_size_ptr' contains the size of the generated code (host
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   code).
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*/
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int cpu_gen_code(CPUState *env, TranslationBlock *tb,
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                 int max_code_size, int *gen_code_size_ptr)
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{
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    uint8_t *gen_code_buf;
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    int gen_code_size;
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#ifdef USE_CODE_COPY
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    if (code_copy_enabled &&
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        cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
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        /* nothing more to do */
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    } else
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#endif
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    {
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        if (gen_intermediate_code(env, tb) < 0)
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            return -1;
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        /* generate machine code */
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        tb->tb_next_offset[0] = 0xffff;
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        tb->tb_next_offset[1] = 0xffff;
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        gen_code_buf = tb->tc_ptr;
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#ifdef USE_DIRECT_JUMP
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        /* the following two entries are optional (only used for string ops) */
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        tb->tb_jmp_offset[2] = 0xffff;
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        tb->tb_jmp_offset[3] = 0xffff;
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#endif
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        dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
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        gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
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#ifdef USE_DIRECT_JUMP
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                                    tb->tb_jmp_offset,
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#else
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                                    NULL,
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#endif
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                                    gen_opc_buf, gen_opparam_buf, gen_labels);
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    }
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    *gen_code_size_ptr = gen_code_size;
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#ifdef DEBUG_DISAS
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    if (loglevel & CPU_LOG_TB_OUT_ASM) {
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        fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
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        disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
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        fprintf(logfile, "\n");
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        fflush(logfile);
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    }
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#endif
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    return 0;
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}
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/* The cpu state corresponding to 'searched_pc' is restored. 
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 */
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int cpu_restore_state(TranslationBlock *tb, 
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                      CPUState *env, unsigned long searched_pc,
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                      void *puc)
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{
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    int j, c;
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    unsigned long tc_ptr;
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    uint16_t *opc_ptr;
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#ifdef USE_CODE_COPY
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    if (tb->cflags & CF_CODE_COPY) {
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        return cpu_restore_state_copy(tb, env, searched_pc, puc);
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    }
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#endif
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    if (gen_intermediate_code_pc(env, tb) < 0)
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        return -1;
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    /* find opc index corresponding to search_pc */
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    tc_ptr = (unsigned long)tb->tc_ptr;
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    if (searched_pc < tc_ptr)
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        return -1;
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    j = 0;
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    opc_ptr = gen_opc_buf;
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    for(;;) {
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        c = *opc_ptr;
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        if (c == INDEX_op_end)
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            return -1;
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        tc_ptr += opc_copy_size[c];
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        if (searched_pc < tc_ptr)
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            break;
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        opc_ptr++;
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    }
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    j = opc_ptr - gen_opc_buf;
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    /* now find start of instruction before */
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    while (gen_opc_instr_start[j] == 0)
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        j--;
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#if defined(TARGET_I386)
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    {
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        int cc_op;
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#ifdef DEBUG_DISAS
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        if (loglevel & CPU_LOG_TB_OP) {
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            int i;
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            fprintf(logfile, "RESTORE:\n");
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            for(i=0;i<=j; i++) {
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                if (gen_opc_instr_start[i]) {
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                    fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
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                }
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            }
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            fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", 
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                    searched_pc, j, gen_opc_pc[j] - tb->cs_base, 
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                    (uint32_t)tb->cs_base);
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        }
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#endif
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        env->eip = gen_opc_pc[j] - tb->cs_base;
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        cc_op = gen_opc_cc_op[j];
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        if (cc_op != CC_OP_DYNAMIC)
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            env->cc_op = cc_op;
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    }
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#elif defined(TARGET_ARM)
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    env->regs[15] = gen_opc_pc[j];
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#elif defined(TARGET_SPARC)
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    /* XXX: restore npc too */
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    env->pc = gen_opc_pc[j];
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    env->npc = gen_opc_npc[j];
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#elif defined(TARGET_PPC)
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    {
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        int type;
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        /* for PPC, we need to look at the micro operation to get the
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           access type */
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        env->nip = gen_opc_pc[j];
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        switch(c) {
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#if defined(CONFIG_USER_ONLY)
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#define CASE3(op)\
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        case INDEX_op_ ## op ## _raw
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#else
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#define CASE3(op)\
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        case INDEX_op_ ## op ## _user:\
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        case INDEX_op_ ## op ## _kernel
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#endif
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        CASE3(stfd):
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        CASE3(stfs):
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        CASE3(lfd):
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        CASE3(lfs):
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            type = ACCESS_FLOAT;
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            break;
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        CASE3(lwarx):
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            type = ACCESS_RES;
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            break;
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        CASE3(stwcx):
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            type = ACCESS_RES;
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            break;
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        CASE3(eciwx):
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        CASE3(ecowx):
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            type = ACCESS_EXT;
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            break;
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        default:
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            type = ACCESS_INT;
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            break;
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        }
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        env->access_type = type;
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    }
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#endif
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    return 0;
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}