Revision c55e9aef target-ppc/cpu.h

b/target-ppc/cpu.h
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typedef struct ppcemb_tlb_t ppcemb_tlb_t;
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struct ppcemb_tlb_t {
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    target_ulong RPN;
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    target_phys_addr_t RPN;
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    target_ulong EPN;
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    target_ulong PID;
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    int size;
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    int prot;
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    int attr; /* Storage attributes */
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    target_ulong size;
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    uint32_t prot;
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    uint32_t attr; /* Storage attributes */
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};
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union ppc_tlb_t {
......
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    int id_tlbs;     /* If 1, MMU has separated TLBs for instructions & data */
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    int nb_pids;     /* Number of available PID registers                    */
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    ppc_tlb_t *tlb;  /* TLB is optional. Allocate them only if needed        */
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    /* Callbacks for specific checks on some implementations */
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    int (*tlb_check_more)(CPUPPCState *env, ppc_tlb_t *tlb, int *prot,
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                          target_ulong vaddr, int rw, int acc_type,
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                          int is_user);
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    /* 403 dedicated access protection registers */
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    target_ulong pb[4];
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