Revision c570fd16 target-mips/op_mem.c

b/target-mips/op_mem.c
75 75

  
76 76
/* "half" load and stores.  We must do the memory access inline,
77 77
   or fault handling won't work.  */
78
/* XXX: This is broken, CP0_BADVADDR has the wrong (aligned) value. */
78 79
void glue(op_lwl, MEMSUFFIX) (void)
79 80
{
80 81
    uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3);
......
125 126
    RETURN();
126 127
}
127 128

  
129
#ifdef MIPS_HAS_MIPS64
130
void glue(op_ld, MEMSUFFIX) (void)
131
{
132
    T0 = glue(ldq, MEMSUFFIX)(T0);
133
    RETURN();
134
}
135

  
136
void glue(op_sd, MEMSUFFIX) (void)
137
{
138
    glue(stq, MEMSUFFIX)(T0, T1);
139
    RETURN();
140
}
141

  
142
/* "half" load and stores.  We must do the memory access inline,
143
   or fault handling won't work.  */
144
void glue(op_ldl, MEMSUFFIX) (void)
145
{
146
    target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
147
    CALL_FROM_TB1(glue(do_ldl, MEMSUFFIX), tmp);
148
    RETURN();
149
}
150

  
151
void glue(op_ldr, MEMSUFFIX) (void)
152
{
153
    target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
154
    CALL_FROM_TB1(glue(do_ldr, MEMSUFFIX), tmp);
155
    RETURN();
156
}
157

  
158
void glue(op_sdl, MEMSUFFIX) (void)
159
{
160
    target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
161
    tmp = CALL_FROM_TB1(glue(do_sdl, MEMSUFFIX), tmp);
162
    glue(stq, MEMSUFFIX)(T0 & ~7, tmp);
163
    RETURN();
164
}
165

  
166
void glue(op_sdr, MEMSUFFIX) (void)
167
{
168
    target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
169
    tmp = CALL_FROM_TB1(glue(do_sdr, MEMSUFFIX), tmp);
170
    glue(stq, MEMSUFFIX)(T0 & ~7, tmp);
171
    RETURN();
172
}
173

  
174
void glue(op_lld, MEMSUFFIX) (void)
175
{
176
    T1 = T0;
177
    T0 = glue(ldq, MEMSUFFIX)(T0);
178
    env->CP0_LLAddr = T1;
179
    RETURN();
180
}
181

  
182
void glue(op_scd, MEMSUFFIX) (void)
183
{
184
    CALL_FROM_TB0(dump_sc);
185
    if (T0 == env->CP0_LLAddr) {
186
        glue(stq, MEMSUFFIX)(T0, T1);
187
        T0 = 1;
188
    } else {
189
        T0 = 0;
190
    }
191
    RETURN();
192
}
193
#endif /* MIPS_HAS_MIPS64 */
194

  
128 195
#ifdef MIPS_USES_FPU
129 196
void glue(op_lwc1, MEMSUFFIX) (void)
130 197
{

Also available in: Unified diff