« Previous | Next » 

Revision c58a6694

IDc58a6694f15d1c0d9a41395fd8882573f7ed042e

Added by Eduardo Habkost about 12 years ago

add Westmere as a qemu cpu model (v2)

Version 1 of this patch was:

Message-Id: <
http://marc.info/?l=qemu-devel&m=130704415919346

This version doesn't have the duplicate feature bits on extfeature_edx, though,
as they are being removed from the Intel models (as they are reserved bits on
Intel CPUs).

Version 1 patch description:

This patch adds Westmere as a qemu cpu model.  The only
    additional guest visible feature of a Westmere relative
    to Nehalem is the inclusion of AES instructions.  However
    as other non-ABI visible modifications exist along with
    fabrication changes, the CPUID data of the corresponding
    deployed silicon was altered slightly to reflect this.
We've seen isolated cases where apparently unrelated yet
    slightly incoherent CPUID data has caused problems, most
    notably during guest boot.  Providing Westmere as a
    model separate fro Nehalem allows us to more easily address
    such quirks.
[ehabkost: edited commit message to have a better Subject line]
Signed-off-by: john cooper &lt;&gt;
    Signed-off-by: Eduardo Habkost &lt;&gt;

Changes version 1 -> version 2:
- Remove the duplicate feature bits on extfeature_edx, that are
reserved on Intel CPUs
- Reorder feature flags
- Remove x2apic from the definition because x2apic requires some fixes
that have to be resubmitted

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>

Files

  • added
  • modified
  • copied
  • renamed
  • deleted

View differences