Revision c5d04e99
| b/target-sparc/helper.h | ||
|---|---|---|
| 115 | 115 |
F_HELPER_0_0(dmulq); |
| 116 | 116 |
|
| 117 | 117 |
DEF_HELPER(float32, helper_fnegs, (float32 src)) |
| 118 |
F_HELPER_DQ_0_0(ito); |
|
| 118 |
F_HELPER_0_0(itod); |
|
| 119 |
DEF_HELPER(void, helper_fitoq, (int32_t src)) |
|
| 119 | 120 |
|
| 120 | 121 |
DEF_HELPER(float32, helper_fitos, (int32_t src)) |
| 121 | 122 |
|
| ... | ... | |
| 126 | 127 |
#endif |
| 127 | 128 |
F_HELPER_0_0(dtos); |
| 128 | 129 |
F_HELPER_0_0(stod); |
| 129 |
F_HELPER_0_0(qtos);
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|
| 130 |
F_HELPER_0_0(stoq);
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|
| 130 |
DEF_HELPER(float32, helper_fqtos, (void))
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|
| 131 |
DEF_HELPER(void, helper_fstoq, (float32 src))
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|
| 131 | 132 |
F_HELPER_0_0(qtod); |
| 132 | 133 |
F_HELPER_0_0(dtoq); |
| 133 | 134 |
DEF_HELPER(int32_t, helper_fstoi, (float32 src)) |
| 134 | 135 |
F_HELPER_0_0(dtoi); |
| 135 |
F_HELPER_0_0(qtoi);
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|
| 136 |
DEF_HELPER(int32_t, helper_fqtoi, (void))
|
|
| 136 | 137 |
#ifdef TARGET_SPARC64 |
| 137 | 138 |
F_HELPER_0_0(stox); |
| 138 | 139 |
F_HELPER_0_0(dtox); |
| b/target-sparc/op_helper.c | ||
|---|---|---|
| 148 | 148 |
DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status); |
| 149 | 149 |
} |
| 150 | 150 |
|
| 151 |
F_HELPER(ito, q)
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|
| 151 |
void helper_fitoq(int32_t src)
|
|
| 152 | 152 |
{
|
| 153 |
QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status);
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| 153 |
QT0 = int32_to_float128(src, &env->fp_status);
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|
| 154 | 154 |
} |
| 155 | 155 |
|
| 156 | 156 |
#ifdef TARGET_SPARC64 |
| ... | ... | |
| 182 | 182 |
DT0 = float32_to_float64(FT1, &env->fp_status); |
| 183 | 183 |
} |
| 184 | 184 |
|
| 185 |
void helper_fqtos(void)
|
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| 185 |
float32 helper_fqtos(void)
|
|
| 186 | 186 |
{
|
| 187 |
FT0 = float128_to_float32(QT1, &env->fp_status);
|
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| 187 |
return float128_to_float32(QT1, &env->fp_status);
|
|
| 188 | 188 |
} |
| 189 | 189 |
|
| 190 |
void helper_fstoq(void)
|
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| 190 |
void helper_fstoq(float32 src)
|
|
| 191 | 191 |
{
|
| 192 |
QT0 = float32_to_float128(FT1, &env->fp_status);
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| 192 |
QT0 = float32_to_float128(src, &env->fp_status);
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|
| 193 | 193 |
} |
| 194 | 194 |
|
| 195 | 195 |
void helper_fqtod(void) |
| ... | ... | |
| 213 | 213 |
*((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status); |
| 214 | 214 |
} |
| 215 | 215 |
|
| 216 |
void helper_fqtoi(void)
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| 216 |
int32_t helper_fqtoi(void)
|
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| 217 | 217 |
{
|
| 218 |
*((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status);
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| 218 |
return float128_to_int32_round_to_zero(QT1, &env->fp_status);
|
|
| 219 | 219 |
} |
| 220 | 220 |
|
| 221 | 221 |
#ifdef TARGET_SPARC64 |
| b/target-sparc/translate.c | ||
|---|---|---|
| 2511 | 2511 |
CHECK_FPU_FEATURE(dc, FLOAT128); |
| 2512 | 2512 |
gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 2513 | 2513 |
gen_clear_float_exceptions(); |
| 2514 |
tcg_gen_helper_0_0(helper_fqtos);
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|
| 2514 |
tcg_gen_helper_1_0(helper_fqtos, cpu_tmp32);
|
|
| 2515 | 2515 |
tcg_gen_helper_0_0(helper_check_ieee_exceptions); |
| 2516 |
gen_op_store_FT0_fpr(rd);
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| 2516 |
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
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|
| 2517 | 2517 |
break; |
| 2518 | 2518 |
case 0xc8: |
| 2519 | 2519 |
gen_op_load_fpr_FT1(rs2); |
| ... | ... | |
| 2535 | 2535 |
break; |
| 2536 | 2536 |
case 0xcc: /* fitoq */ |
| 2537 | 2537 |
CHECK_FPU_FEATURE(dc, FLOAT128); |
| 2538 |
gen_op_load_fpr_FT1(rs2); |
|
| 2539 |
tcg_gen_helper_0_0(helper_fitoq); |
|
| 2538 |
tcg_gen_helper_0_1(helper_fitoq, cpu_fpr[rs2]); |
|
| 2540 | 2539 |
gen_op_store_QT0_fpr(QFPREG(rd)); |
| 2541 | 2540 |
break; |
| 2542 | 2541 |
case 0xcd: /* fstoq */ |
| 2543 | 2542 |
CHECK_FPU_FEATURE(dc, FLOAT128); |
| 2544 |
gen_op_load_fpr_FT1(rs2); |
|
| 2545 |
tcg_gen_helper_0_0(helper_fstoq); |
|
| 2543 |
tcg_gen_helper_0_1(helper_fstoq, cpu_fpr[rs2]); |
|
| 2546 | 2544 |
gen_op_store_QT0_fpr(QFPREG(rd)); |
| 2547 | 2545 |
break; |
| 2548 | 2546 |
case 0xce: /* fdtoq */ |
| ... | ... | |
| 2569 | 2567 |
CHECK_FPU_FEATURE(dc, FLOAT128); |
| 2570 | 2568 |
gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 2571 | 2569 |
gen_clear_float_exceptions(); |
| 2572 |
tcg_gen_helper_0_0(helper_fqtoi);
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| 2570 |
tcg_gen_helper_1_0(helper_fqtoi, cpu_tmp32);
|
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| 2573 | 2571 |
tcg_gen_helper_0_0(helper_check_ieee_exceptions); |
| 2574 |
gen_op_store_FT0_fpr(rd);
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| 2572 |
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
|
|
| 2575 | 2573 |
break; |
| 2576 | 2574 |
#ifdef TARGET_SPARC64 |
| 2577 | 2575 |
case 0x2: /* V9 fmovd */ |
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