Revision c5df018e hw/ppc_prep.c
| b/hw/ppc_prep.c | ||
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| 21 | 21 |
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 |
* THE SOFTWARE. |
| 23 | 23 |
*/ |
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <getopt.h> |
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#include <inttypes.h> |
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#include <unistd.h> |
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#include <sys/mman.h> |
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#include <fcntl.h> |
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#include <signal.h> |
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#include <time.h> |
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#include <sys/time.h> |
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#include <malloc.h> |
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#include <termios.h> |
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#include <sys/poll.h> |
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#include <errno.h> |
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#include <sys/wait.h> |
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#include <netinet/in.h> |
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#include "cpu.h" |
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| 44 | 24 |
#include "vl.h" |
| 45 | 25 |
#include "m48t59.h" |
| 46 | 26 |
|
| ... | ... | |
| 209 | 189 |
&PPC_io_readl, |
| 210 | 190 |
}; |
| 211 | 191 |
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uint32_t pic_intack_read(CPUState *env); |
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| 214 | 192 |
/* Read-only register (?) */ |
| 215 | 193 |
static void _PPC_ioB_write (uint32_t addr, uint32_t value, uint32_t vaddr) |
| 216 | 194 |
{
|
| ... | ... | |
| 368 | 346 |
#define NVRAM_OSAREA_SIZE 512 |
| 369 | 347 |
#define NVRAM_CONFSIZE 1024 |
| 370 | 348 |
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static inline void NVRAM_set_byte (void *opaque, uint32_t addr, uint8_t value)
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static inline void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value)
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| 372 | 350 |
{
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m48t59_set_addr(opaque, addr);
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m48t59_write(opaque, value);
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m48t59_set_addr(nvram, addr);
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m48t59_write(nvram, value);
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} |
| 376 | 354 |
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static inline uint8_t NVRAM_get_byte (void *opaque, uint32_t addr)
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static inline uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr)
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| 378 | 356 |
{
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m48t59_set_addr(opaque, addr);
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return m48t59_read(opaque);
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m48t59_set_addr(nvram, addr);
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return m48t59_read(nvram);
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| 381 | 359 |
} |
| 382 | 360 |
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static inline void NVRAM_set_word (void *opaque, uint32_t addr, uint16_t value)
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static inline void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value)
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| 384 | 362 |
{
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m48t59_set_addr(opaque, addr);
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m48t59_write(opaque, value >> 8);
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m48t59_set_addr(opaque, addr + 1);
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m48t59_write(opaque, value & 0xFF);
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m48t59_set_addr(nvram, addr);
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m48t59_write(nvram, value >> 8);
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m48t59_set_addr(nvram, addr + 1);
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m48t59_write(nvram, value & 0xFF);
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} |
| 390 | 368 |
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static inline uint16_t NVRAM_get_word (void *opaque, uint32_t addr)
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static inline uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr)
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| 392 | 370 |
{
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uint16_t tmp; |
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m48t59_set_addr(opaque, addr);
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tmp = m48t59_read(opaque) << 8;
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m48t59_set_addr(opaque, addr + 1);
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tmp |= m48t59_read(opaque);
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m48t59_set_addr(nvram, addr);
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tmp = m48t59_read(nvram) << 8;
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m48t59_set_addr(nvram, addr + 1);
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tmp |= m48t59_read(nvram);
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| 399 | 377 |
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| 400 | 378 |
return tmp; |
| 401 | 379 |
} |
| 402 | 380 |
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static inline void NVRAM_set_lword (void *opaque, uint32_t addr,
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static inline void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr,
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uint32_t value) |
| 405 | 383 |
{
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m48t59_set_addr(opaque, addr);
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m48t59_write(opaque, value >> 24);
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m48t59_set_addr(opaque, addr + 1);
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m48t59_write(opaque, (value >> 16) & 0xFF);
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m48t59_set_addr(opaque, addr + 2);
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m48t59_write(opaque, (value >> 8) & 0xFF);
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m48t59_set_addr(opaque, addr + 3);
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m48t59_write(opaque, value & 0xFF);
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m48t59_set_addr(nvram, addr);
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m48t59_write(nvram, value >> 24);
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m48t59_set_addr(nvram, addr + 1);
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m48t59_write(nvram, (value >> 16) & 0xFF);
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m48t59_set_addr(nvram, addr + 2);
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m48t59_write(nvram, (value >> 8) & 0xFF);
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m48t59_set_addr(nvram, addr + 3);
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m48t59_write(nvram, value & 0xFF);
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| 414 | 392 |
} |
| 415 | 393 |
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static inline uint32_t NVRAM_get_lword (void *opaque, uint32_t addr)
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static inline uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr)
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| 417 | 395 |
{
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uint32_t tmp; |
| 419 | 397 |
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m48t59_set_addr(opaque, addr);
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tmp = m48t59_read(opaque) << 24;
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m48t59_set_addr(opaque, addr + 1);
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tmp |= m48t59_read(opaque) << 16;
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m48t59_set_addr(opaque, addr + 2);
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tmp |= m48t59_read(opaque) << 8;
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m48t59_set_addr(opaque, addr + 3);
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tmp |= m48t59_read(opaque);
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m48t59_set_addr(nvram, addr);
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tmp = m48t59_read(nvram) << 24;
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m48t59_set_addr(nvram, addr + 1);
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tmp |= m48t59_read(nvram) << 16;
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m48t59_set_addr(nvram, addr + 2);
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tmp |= m48t59_read(nvram) << 8;
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m48t59_set_addr(nvram, addr + 3);
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tmp |= m48t59_read(nvram);
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| 428 | 406 |
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return tmp; |
| 430 | 408 |
} |
| ... | ... | |
| 444 | 422 |
return tmp; |
| 445 | 423 |
} |
| 446 | 424 |
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static void NVRAM_set_crc (void *opaque, uint32_t addr,
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static void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
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| 448 | 426 |
uint32_t start, uint32_t count) |
| 449 | 427 |
{
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| 450 | 428 |
uint32_t i; |
| ... | ... | |
| 455 | 433 |
odd = 1; |
| 456 | 434 |
count &= ~1; |
| 457 | 435 |
for (i = 0; i != count; i++) {
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crc = NVRAM_crc_update(crc, NVRAM_get_word(opaque, start + i));
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crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i));
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| 459 | 437 |
} |
| 460 | 438 |
if (odd) {
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crc = NVRAM_crc_update(crc, NVRAM_get_byte(opaque, start + i) << 8);
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crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8);
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| 462 | 440 |
} |
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NVRAM_set_word(opaque, addr, crc);
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NVRAM_set_word(nvram, addr, crc);
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| 464 | 442 |
} |
| 465 | 443 |
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static void prep_NVRAM_init (void) |
| 467 | 445 |
{
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void *opaque;
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m48t59_t *nvram;
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| 469 | 447 |
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opaque = m48t59_init(8, 0x0074, NVRAM_SIZE);
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nvram = m48t59_init(8, 0x0074, NVRAM_SIZE);
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| 471 | 449 |
/* NVRAM header */ |
| 472 | 450 |
/* 0x00: NVRAM size in kB */ |
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NVRAM_set_word(opaque, 0x00, NVRAM_SIZE >> 10);
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NVRAM_set_word(nvram, 0x00, NVRAM_SIZE >> 10);
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| 474 | 452 |
/* 0x02: NVRAM version */ |
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NVRAM_set_byte(opaque, 0x02, 0x01);
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NVRAM_set_byte(nvram, 0x02, 0x01);
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| 476 | 454 |
/* 0x03: NVRAM revision */ |
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NVRAM_set_byte(opaque, 0x03, 0x01);
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NVRAM_set_byte(nvram, 0x03, 0x01);
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| 478 | 456 |
/* 0x08: last OS */ |
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NVRAM_set_byte(opaque, 0x08, 0x00); /* Unknown */
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NVRAM_set_byte(nvram, 0x08, 0x00); /* Unknown */
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| 480 | 458 |
/* 0x09: endian */ |
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NVRAM_set_byte(opaque, 0x09, 'B'); /* Big-endian */
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NVRAM_set_byte(nvram, 0x09, 'B'); /* Big-endian */
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| 482 | 460 |
/* 0x0A: OSArea usage */ |
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NVRAM_set_byte(opaque, 0x0A, 0x00); /* Empty */
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NVRAM_set_byte(nvram, 0x0A, 0x00); /* Empty */
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| 484 | 462 |
/* 0x0B: PM mode */ |
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NVRAM_set_byte(opaque, 0x0B, 0x00); /* Normal */
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NVRAM_set_byte(nvram, 0x0B, 0x00); /* Normal */
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| 486 | 464 |
/* Restart block description record */ |
| 487 | 465 |
/* 0x0C: restart block version */ |
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NVRAM_set_word(opaque, 0x0C, 0x01);
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NVRAM_set_word(nvram, 0x0C, 0x01);
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| 489 | 467 |
/* 0x0E: restart block revision */ |
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NVRAM_set_word(opaque, 0x0E, 0x01);
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NVRAM_set_word(nvram, 0x0E, 0x01);
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| 491 | 469 |
/* 0x20: restart address */ |
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NVRAM_set_lword(opaque, 0x20, 0x00);
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NVRAM_set_lword(nvram, 0x20, 0x00);
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| 493 | 471 |
/* 0x24: save area address */ |
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NVRAM_set_lword(opaque, 0x24, 0x00);
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NVRAM_set_lword(nvram, 0x24, 0x00);
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| 495 | 473 |
/* 0x28: save area length */ |
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NVRAM_set_lword(opaque, 0x28, 0x00);
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NVRAM_set_lword(nvram, 0x28, 0x00);
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| 497 | 475 |
/* 0x1C: checksum of restart block */ |
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NVRAM_set_crc(opaque, 0x1C, 0x0C, 32);
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NVRAM_set_crc(nvram, 0x1C, 0x0C, 32);
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| 499 | 477 |
|
| 500 | 478 |
/* Security section */ |
| 501 | 479 |
/* Set all to zero */ |
| 502 | 480 |
/* 0xC4: pointer to global environment area */ |
| 503 |
NVRAM_set_lword(opaque, 0xC4, 0x0100);
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NVRAM_set_lword(nvram, 0xC4, 0x0100);
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| 504 | 482 |
/* 0xC8: size of global environment area */ |
| 505 |
NVRAM_set_lword(opaque, 0xC8,
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NVRAM_set_lword(nvram, 0xC8,
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| 506 | 484 |
NVRAM_END - NVRAM_OSAREA_SIZE - NVRAM_CONFSIZE - 0x0100); |
| 507 | 485 |
/* 0xD4: pointer to configuration area */ |
| 508 |
NVRAM_set_lword(opaque, 0xD4, NVRAM_END - NVRAM_CONFSIZE);
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| 486 |
NVRAM_set_lword(nvram, 0xD4, NVRAM_END - NVRAM_CONFSIZE);
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| 509 | 487 |
/* 0xD8: size of configuration area */ |
| 510 |
NVRAM_set_lword(opaque, 0xD8, NVRAM_CONFSIZE);
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| 488 |
NVRAM_set_lword(nvram, 0xD8, NVRAM_CONFSIZE);
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| 511 | 489 |
/* 0xE8: pointer to OS specific area */ |
| 512 |
NVRAM_set_lword(opaque, 0xE8,
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NVRAM_set_lword(nvram, 0xE8,
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| 513 | 491 |
NVRAM_END - NVRAM_CONFSIZE - NVRAM_OSAREA_SIZE); |
| 514 | 492 |
/* 0xD8: size of OS specific area */ |
| 515 |
NVRAM_set_lword(opaque, 0xEC, NVRAM_OSAREA_SIZE);
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NVRAM_set_lword(nvram, 0xEC, NVRAM_OSAREA_SIZE);
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| 516 | 494 |
|
| 517 | 495 |
/* Configuration area */ |
| 518 | 496 |
/* RTC init */ |
| 519 |
// NVRAM_set_lword(opaque, 0x1FFC, 0x50);
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// NVRAM_set_lword(nvram, 0x1FFC, 0x50);
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| 520 | 498 |
|
| 521 | 499 |
/* 0x04: checksum 0 => OS area */ |
| 522 |
NVRAM_set_crc(opaque, 0x04, 0x00,
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| 500 |
NVRAM_set_crc(nvram, 0x04, 0x00,
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| 523 | 501 |
NVRAM_END - NVRAM_CONFSIZE - NVRAM_OSAREA_SIZE); |
| 524 | 502 |
/* 0x06: checksum of config area */ |
| 525 |
NVRAM_set_crc(opaque, 0x06, NVRAM_END - NVRAM_CONFSIZE, NVRAM_CONFSIZE);
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NVRAM_set_crc(nvram, 0x06, NVRAM_END - NVRAM_CONFSIZE, NVRAM_CONFSIZE);
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| 526 | 504 |
} |
| 527 | 505 |
|
| 528 | 506 |
int load_initrd (const char *filename, uint8_t *addr) |
Also available in: Unified diff