Revision c68ea704 hw/mips_r4k.c
b/hw/mips_r4k.c | ||
---|---|---|
11 | 11 |
|
12 | 12 |
static void pic_irq_request(void *opaque, int level) |
13 | 13 |
{ |
14 |
CPUState *env = first_cpu; |
|
14 | 15 |
if (level) { |
15 |
cpu_single_env->CP0_Cause |= 0x00000400;
|
|
16 |
cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
|
|
16 |
env->CP0_Cause |= 0x00000400; |
|
17 |
cpu_interrupt(env, CPU_INTERRUPT_HARD); |
|
17 | 18 |
} else { |
18 |
cpu_single_env->CP0_Cause &= ~0x00000400;
|
|
19 |
cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
|
|
19 |
env->CP0_Cause &= ~0x00000400; |
|
20 |
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
|
20 | 21 |
} |
21 | 22 |
} |
22 | 23 |
|
... | ... | |
74 | 75 |
void cpu_mips_store_compare (CPUState *env, uint32_t value) |
75 | 76 |
{ |
76 | 77 |
cpu_mips_update_count(env, cpu_mips_get_count(env), value); |
77 |
cpu_single_env->CP0_Cause &= ~0x00008000;
|
|
78 |
cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
|
|
78 |
env->CP0_Cause &= ~0x00008000; |
|
79 |
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
|
79 | 80 |
} |
80 | 81 |
|
81 | 82 |
static void mips_timer_cb (void *opaque) |
... | ... | |
89 | 90 |
} |
90 | 91 |
#endif |
91 | 92 |
cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); |
92 |
cpu_single_env->CP0_Cause |= 0x00008000;
|
|
93 |
cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
|
|
93 |
env->CP0_Cause |= 0x00008000; |
|
94 |
cpu_interrupt(env, CPU_INTERRUPT_HARD); |
|
94 | 95 |
} |
95 | 96 |
|
96 | 97 |
void cpu_mips_clock_init (CPUState *env) |
... | ... | |
181 | 182 |
int io_memory; |
182 | 183 |
int linux_boot; |
183 | 184 |
int ret; |
185 |
CPUState *env; |
|
184 | 186 |
|
185 | 187 |
printf("%s: start\n", __func__); |
186 | 188 |
linux_boot = (kernel_filename != NULL); |
189 |
|
|
190 |
env = cpu_init(); |
|
191 |
register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); |
|
192 |
|
|
187 | 193 |
/* allocate RAM */ |
188 | 194 |
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); |
189 | 195 |
bios_offset = ram_size + vga_ram_size; |
... | ... | |
198 | 204 |
BIOS_SIZE, bios_offset | IO_MEM_ROM); |
199 | 205 |
#if 0 |
200 | 206 |
memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE); |
201 |
cpu_single_env->PC = 0x80010004;
|
|
207 |
env->PC = 0x80010004; |
|
202 | 208 |
#else |
203 |
cpu_single_env->PC = 0xBFC00004;
|
|
209 |
env->PC = 0xBFC00004; |
|
204 | 210 |
#endif |
205 | 211 |
if (linux_boot) { |
206 | 212 |
kernel_base = KERNEL_LOAD_ADDR; |
... | ... | |
226 | 232 |
initrd_base = 0; |
227 | 233 |
initrd_size = 0; |
228 | 234 |
} |
229 |
cpu_single_env->PC = KERNEL_LOAD_ADDR;
|
|
235 |
env->PC = KERNEL_LOAD_ADDR; |
|
230 | 236 |
} else { |
231 | 237 |
kernel_base = 0; |
232 | 238 |
kernel_size = 0; |
... | ... | |
235 | 241 |
} |
236 | 242 |
|
237 | 243 |
/* Init internal devices */ |
238 |
cpu_mips_clock_init(cpu_single_env);
|
|
244 |
cpu_mips_clock_init(env); |
|
239 | 245 |
cpu_mips_irqctrl_init(); |
240 | 246 |
|
241 | 247 |
/* Register 64 KB of ISA IO space at 0x14000000 */ |
... | ... | |
243 | 249 |
cpu_register_physical_memory(0x14000000, 0x00010000, io_memory); |
244 | 250 |
isa_mem_base = 0x10000000; |
245 | 251 |
|
246 |
isa_pic = pic_init(pic_irq_request, cpu_single_env);
|
|
252 |
isa_pic = pic_init(pic_irq_request, env); |
|
247 | 253 |
pit = pit_init(0x40, 0); |
248 | 254 |
serial_init(0x3f8, 4, serial_hds[0]); |
249 | 255 |
vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size, |
Also available in: Unified diff