Revision c6fa82c4

b/target-i386/helper.c
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//#define DEBUG_MMU
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/* feature flags taken from "Intel Processor Identification and the CPUID
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 * Instruction" and AMD's "CPUID Specification". In cases of disagreement
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 * about feature names, the Linux name is used. */
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static const char *feature_name[] = {
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    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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    "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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    "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx",
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    "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe",
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};
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static const char *ext_feature_name[] = {
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    "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est",
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    "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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    NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
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       NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static const char *ext2_feature_name[] = {
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    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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    "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mtrr", "pge", "mca", "cmov",
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    "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx",
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    "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
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};
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static const char *ext3_feature_name[] = {
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    "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
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    "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL,
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, 
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                                    uint32_t *ext_features, 
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                                    uint32_t *ext2_features, 
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                                    uint32_t *ext3_features)
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{
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    int i;
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    /* feature flags taken from "Intel Processor Identification and the CPUID
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     * Instruction" and AMD's "CPUID Specification". In cases of disagreement 
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     * about feature names, the Linux name is used. */
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    static const char *feature_name[] = {
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        "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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        "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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        "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx",
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        "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe",
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    };
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    static const char *ext_feature_name[] = {
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       "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est",
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       "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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       NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
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       NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    };
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    static const char *ext2_feature_name[] = {
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       "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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       "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mtrr", "pge", "mca", "cmov",
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       "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx",
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       "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
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    };
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    static const char *ext3_feature_name[] = {
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       "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
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       "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL,
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       NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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       NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    };
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    for ( i = 0 ; i < 32 ; i++ ) 
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        if (feature_name[i] && !strcmp (flagname, feature_name[i])) {

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