Revision c732abe2
b/linux-user/main.c | ||
---|---|---|
1945 | 1945 |
} else if (!strcmp(r, "cpu")) { |
1946 | 1946 |
cpu_model = argv[optind++]; |
1947 | 1947 |
if (strcmp(cpu_model, "?") == 0) { |
1948 |
#if defined(TARGET_PPC) |
|
1949 |
ppc_cpu_list(stdout, &fprintf); |
|
1950 |
#elif defined(TARGET_ARM) |
|
1951 |
arm_cpu_list(); |
|
1952 |
#elif defined(TARGET_MIPS) |
|
1953 |
mips_cpu_list(stdout, &fprintf); |
|
1954 |
#elif defined(TARGET_SPARC) |
|
1955 |
sparc_cpu_list(stdout, &fprintf); |
|
1948 |
/* XXX: implement xxx_cpu_list for targets that still miss it */ |
|
1949 |
#if defined(cpu_list) |
|
1950 |
cpu_list(stdout, &fprintf); |
|
1956 | 1951 |
#endif |
1957 | 1952 |
_exit(1); |
1958 | 1953 |
} |
b/target-arm/cpu.h | ||
---|---|---|
260 | 260 |
return (env->features & (1u << feature)) != 0; |
261 | 261 |
} |
262 | 262 |
|
263 |
void arm_cpu_list(void);
|
|
263 |
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
|
|
264 | 264 |
void cpu_arm_set_model(CPUARMState *env, const char *name); |
265 | 265 |
|
266 | 266 |
void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, |
... | ... | |
299 | 299 |
#define cpu_exec cpu_arm_exec |
300 | 300 |
#define cpu_gen_code cpu_arm_gen_code |
301 | 301 |
#define cpu_signal_handler cpu_arm_signal_handler |
302 |
#define cpu_list arm_cpu_list |
|
302 | 303 |
|
303 | 304 |
#include "cpu-all.h" |
304 | 305 |
|
b/target-arm/helper.c | ||
---|---|---|
126 | 126 |
{ 0, NULL} |
127 | 127 |
}; |
128 | 128 |
|
129 |
void arm_cpu_list(void)
|
|
129 |
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
|
|
130 | 130 |
{ |
131 | 131 |
int i; |
132 | 132 |
|
133 |
printf ("Available CPUs:\n");
|
|
133 |
(*cpu_fprintf)(f, "Available CPUs:\n");
|
|
134 | 134 |
for (i = 0; arm_cpu_names[i].name; i++) { |
135 |
printf(" %s\n", arm_cpu_names[i].name);
|
|
135 |
(*cpu_fprintf)(f, " %s\n", arm_cpu_names[i].name);
|
|
136 | 136 |
} |
137 | 137 |
} |
138 | 138 |
|
b/target-mips/cpu.h | ||
---|---|---|
482 | 482 |
#define cpu_exec cpu_mips_exec |
483 | 483 |
#define cpu_gen_code cpu_mips_gen_code |
484 | 484 |
#define cpu_signal_handler cpu_mips_signal_handler |
485 |
#define cpu_list mips_cpu_list |
|
485 | 486 |
|
486 | 487 |
#include "cpu-all.h" |
487 | 488 |
|
b/target-ppc/cpu.h | ||
---|---|---|
697 | 697 |
#define cpu_exec cpu_ppc_exec |
698 | 698 |
#define cpu_gen_code cpu_ppc_gen_code |
699 | 699 |
#define cpu_signal_handler cpu_ppc_signal_handler |
700 |
#define cpu_list ppc_cpu_list |
|
700 | 701 |
|
701 | 702 |
#include "cpu-all.h" |
702 | 703 |
|
b/target-sparc/cpu.h | ||
---|---|---|
315 | 315 |
#define cpu_exec cpu_sparc_exec |
316 | 316 |
#define cpu_gen_code cpu_sparc_gen_code |
317 | 317 |
#define cpu_signal_handler cpu_sparc_signal_handler |
318 |
#define cpu_list sparc_cpu_list |
|
318 | 319 |
|
319 | 320 |
#include "cpu-all.h" |
320 | 321 |
|
b/vl.c | ||
---|---|---|
7690 | 7690 |
case QEMU_OPTION_cpu: |
7691 | 7691 |
/* hw initialization will check this */ |
7692 | 7692 |
if (*optarg == '?') { |
7693 |
#if defined(TARGET_PPC) |
|
7694 |
ppc_cpu_list(stdout, &fprintf); |
|
7695 |
#elif defined(TARGET_ARM) |
|
7696 |
arm_cpu_list(); |
|
7697 |
#elif defined(TARGET_MIPS) |
|
7698 |
mips_cpu_list(stdout, &fprintf); |
|
7699 |
#elif defined(TARGET_SPARC) |
|
7700 |
sparc_cpu_list(stdout, &fprintf); |
|
7693 |
/* XXX: implement xxx_cpu_list for targets that still miss it */ |
|
7694 |
#if defined(cpu_list) |
|
7695 |
cpu_list(stdout, &fprintf); |
|
7701 | 7696 |
#endif |
7702 | 7697 |
exit(0); |
7703 | 7698 |
} else { |
b/vl.h | ||
---|---|---|
741 | 741 |
|
742 | 742 |
typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
743 | 743 |
|
744 |
#if defined(TARGET_PPC) |
|
745 |
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); |
|
746 |
#endif |
|
747 |
|
|
748 |
#if defined(TARGET_MIPS) |
|
749 |
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); |
|
750 |
#endif |
|
751 |
|
|
752 | 744 |
#include "hw/irq.h" |
753 | 745 |
|
754 | 746 |
/* ISA bus */ |
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