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/*
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* QEMU IDE disk and CD/DVD-ROM Emulator
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*
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* Copyright (c) 2003 Fabrice Bellard
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* Copyright (c) 2006 Openedhand Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <hw/hw.h> |
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#include <hw/pc.h> |
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#include <hw/pci.h> |
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#include "qemu-error.h" |
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#include "qemu-timer.h" |
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#include "sysemu.h" |
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#include "dma.h" |
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#include "blockdev.h" |
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|
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#include <hw/ide/internal.h> |
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/* These values were based on a Seagate ST3500418AS but have been modified
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to make more sense in QEMU */
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static const int smart_attributes[][12] = { |
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/* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
|
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/* raw read error rate*/
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{ 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06}, |
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/* spin up */
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{ 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, |
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/* start stop count */
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{ 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14}, |
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/* remapped sectors */
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{ 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24}, |
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/* power on hours */
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{ 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, |
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/* power cycle count */
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{ 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, |
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/* airflow-temperature-celsius */
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{ 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32}, |
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/* end of list */
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{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} |
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}; |
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|
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static int ide_handle_rw_error(IDEState *s, int error, int op); |
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static void ide_dummy_transfer_stop(IDEState *s); |
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|
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static void padstr(char *str, const char *src, int len) |
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{ |
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int i, v;
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for(i = 0; i < len; i++) { |
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if (*src)
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v = *src++; |
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else
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v = ' ';
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str[i^1] = v;
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} |
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} |
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|
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static void put_le16(uint16_t *p, unsigned int v) |
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{ |
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*p = cpu_to_le16(v); |
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} |
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|
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static void ide_identify(IDEState *s) |
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{ |
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uint16_t *p; |
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unsigned int oldsize; |
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IDEDevice *dev = s->unit ? s->bus->slave : s->bus->master; |
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|
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if (s->identify_set) {
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memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
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return;
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} |
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memset(s->io_buffer, 0, 512); |
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p = (uint16_t *)s->io_buffer; |
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put_le16(p + 0, 0x0040); |
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put_le16(p + 1, s->cylinders);
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put_le16(p + 3, s->heads);
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put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */ |
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put_le16(p + 5, 512); /* XXX: retired, remove ? */ |
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put_le16(p + 6, s->sectors);
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padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */ |
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put_le16(p + 20, 3); /* XXX: retired, remove ? */ |
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put_le16(p + 21, 512); /* cache size in sectors */ |
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put_le16(p + 22, 4); /* ecc bytes */ |
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padstr((char *)(p + 23), s->version, 8); /* firmware version */ |
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padstr((char *)(p + 27), "QEMU HARDDISK", 40); /* model */ |
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#if MAX_MULT_SECTORS > 1 |
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put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); |
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#endif
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put_le16(p + 48, 1); /* dword I/O */ |
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put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */ |
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put_le16(p + 51, 0x200); /* PIO transfer cycle */ |
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put_le16(p + 52, 0x200); /* DMA transfer cycle */ |
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put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */ |
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put_le16(p + 54, s->cylinders);
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put_le16(p + 55, s->heads);
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put_le16(p + 56, s->sectors);
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oldsize = s->cylinders * s->heads * s->sectors; |
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put_le16(p + 57, oldsize);
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put_le16(p + 58, oldsize >> 16); |
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if (s->mult_sectors)
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put_le16(p + 59, 0x100 | s->mult_sectors); |
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put_le16(p + 60, s->nb_sectors);
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put_le16(p + 61, s->nb_sectors >> 16); |
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put_le16(p + 62, 0x07); /* single word dma0-2 supported */ |
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put_le16(p + 63, 0x07); /* mdma0-2 supported */ |
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put_le16(p + 64, 0x03); /* pio3-4 supported */ |
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put_le16(p + 65, 120); |
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put_le16(p + 66, 120); |
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put_le16(p + 67, 120); |
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put_le16(p + 68, 120); |
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if (dev && dev->conf.discard_granularity) {
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put_le16(p + 69, (1 << 14)); /* determinate TRIM behavior */ |
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} |
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if (s->ncq_queues) {
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put_le16(p + 75, s->ncq_queues - 1); |
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/* NCQ supported */
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put_le16(p + 76, (1 << 8)); |
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} |
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put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */ |
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put_le16(p + 81, 0x16); /* conforms to ata5 */ |
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/* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
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put_le16(p + 82, (1 << 14) | (1 << 5) | 1); |
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/* 13=flush_cache_ext,12=flush_cache,10=lba48 */
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put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10)); |
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/* 14=set to 1, 1=SMART self test, 0=SMART error logging */
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put_le16(p + 84, (1 << 14) | 0); |
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/* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
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if (bdrv_enable_write_cache(s->bs))
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put_le16(p + 85, (1 << 14) | (1 << 5) | 1); |
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else
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put_le16(p + 85, (1 << 14) | 1); |
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/* 13=flush_cache_ext,12=flush_cache,10=lba48 */
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put_le16(p + 86, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10)); |
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/* 14=set to 1, 1=smart self test, 0=smart error logging */
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put_le16(p + 87, (1 << 14) | 0); |
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put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */ |
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put_le16(p + 93, 1 | (1 << 14) | 0x2000); |
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put_le16(p + 100, s->nb_sectors);
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put_le16(p + 101, s->nb_sectors >> 16); |
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put_le16(p + 102, s->nb_sectors >> 32); |
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put_le16(p + 103, s->nb_sectors >> 48); |
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if (dev && dev->conf.physical_block_size)
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put_le16(p + 106, 0x6000 | get_physical_block_exp(&dev->conf)); |
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if (dev && dev->conf.discard_granularity) {
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put_le16(p + 169, 1); /* TRIM support */ |
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} |
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memcpy(s->identify_data, p, sizeof(s->identify_data));
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s->identify_set = 1;
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} |
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static void ide_atapi_identify(IDEState *s) |
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{ |
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uint16_t *p; |
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if (s->identify_set) {
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memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
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return;
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} |
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memset(s->io_buffer, 0, 512); |
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p = (uint16_t *)s->io_buffer; |
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/* Removable CDROM, 50us response, 12 byte packets */
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put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0)); |
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padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */ |
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put_le16(p + 20, 3); /* buffer type */ |
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put_le16(p + 21, 512); /* cache size in sectors */ |
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put_le16(p + 22, 4); /* ecc bytes */ |
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padstr((char *)(p + 23), s->version, 8); /* firmware version */ |
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padstr((char *)(p + 27), "QEMU DVD-ROM", 40); /* model */ |
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put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */ |
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#ifdef USE_DMA_CDROM
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put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */ |
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put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */ |
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put_le16(p + 62, 7); /* single word dma0-2 supported */ |
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put_le16(p + 63, 7); /* mdma0-2 supported */ |
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#else
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put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */ |
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put_le16(p + 53, 3); /* words 64-70, 54-58 valid */ |
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put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */ |
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#endif
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put_le16(p + 64, 3); /* pio3-4 supported */ |
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put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */ |
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put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */ |
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put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */ |
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put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */ |
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|
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put_le16(p + 71, 30); /* in ns */ |
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put_le16(p + 72, 30); /* in ns */ |
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|
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if (s->ncq_queues) {
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put_le16(p + 75, s->ncq_queues - 1); |
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/* NCQ supported */
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put_le16(p + 76, (1 << 8)); |
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} |
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put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */ |
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#ifdef USE_DMA_CDROM
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put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */ |
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#endif
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memcpy(s->identify_data, p, sizeof(s->identify_data));
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s->identify_set = 1;
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} |
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|
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static void ide_cfata_identify(IDEState *s) |
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{ |
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uint16_t *p; |
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uint32_t cur_sec; |
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|
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p = (uint16_t *) s->identify_data; |
231 |
if (s->identify_set)
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goto fill_buffer;
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|
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memset(p, 0, sizeof(s->identify_data)); |
235 |
|
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cur_sec = s->cylinders * s->heads * s->sectors; |
237 |
|
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put_le16(p + 0, 0x848a); /* CF Storage Card signature */ |
239 |
put_le16(p + 1, s->cylinders); /* Default cylinders */ |
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put_le16(p + 3, s->heads); /* Default heads */ |
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put_le16(p + 6, s->sectors); /* Default sectors per track */ |
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put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */ |
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put_le16(p + 8, s->nb_sectors); /* Sectors per card */ |
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padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */ |
245 |
put_le16(p + 22, 0x0004); /* ECC bytes */ |
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padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */ |
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padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */ |
248 |
#if MAX_MULT_SECTORS > 1 |
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put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); |
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#else
|
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put_le16(p + 47, 0x0000); |
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#endif
|
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put_le16(p + 49, 0x0f00); /* Capabilities */ |
254 |
put_le16(p + 51, 0x0002); /* PIO cycle timing mode */ |
255 |
put_le16(p + 52, 0x0001); /* DMA cycle timing mode */ |
256 |
put_le16(p + 53, 0x0003); /* Translation params valid */ |
257 |
put_le16(p + 54, s->cylinders); /* Current cylinders */ |
258 |
put_le16(p + 55, s->heads); /* Current heads */ |
259 |
put_le16(p + 56, s->sectors); /* Current sectors */ |
260 |
put_le16(p + 57, cur_sec); /* Current capacity */ |
261 |
put_le16(p + 58, cur_sec >> 16); /* Current capacity */ |
262 |
if (s->mult_sectors) /* Multiple sector setting */ |
263 |
put_le16(p + 59, 0x100 | s->mult_sectors); |
264 |
put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */ |
265 |
put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */ |
266 |
put_le16(p + 63, 0x0203); /* Multiword DMA capability */ |
267 |
put_le16(p + 64, 0x0001); /* Flow Control PIO support */ |
268 |
put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */ |
269 |
put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */ |
270 |
put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */ |
271 |
put_le16(p + 82, 0x400c); /* Command Set supported */ |
272 |
put_le16(p + 83, 0x7068); /* Command Set supported */ |
273 |
put_le16(p + 84, 0x4000); /* Features supported */ |
274 |
put_le16(p + 85, 0x000c); /* Command Set enabled */ |
275 |
put_le16(p + 86, 0x7044); /* Command Set enabled */ |
276 |
put_le16(p + 87, 0x4000); /* Features enabled */ |
277 |
put_le16(p + 91, 0x4060); /* Current APM level */ |
278 |
put_le16(p + 129, 0x0002); /* Current features option */ |
279 |
put_le16(p + 130, 0x0005); /* Reassigned sectors */ |
280 |
put_le16(p + 131, 0x0001); /* Initial power mode */ |
281 |
put_le16(p + 132, 0x0000); /* User signature */ |
282 |
put_le16(p + 160, 0x8100); /* Power requirement */ |
283 |
put_le16(p + 161, 0x8001); /* CF command set */ |
284 |
|
285 |
s->identify_set = 1;
|
286 |
|
287 |
fill_buffer:
|
288 |
memcpy(s->io_buffer, p, sizeof(s->identify_data));
|
289 |
} |
290 |
|
291 |
static void ide_set_signature(IDEState *s) |
292 |
{ |
293 |
s->select &= 0xf0; /* clear head */ |
294 |
/* put signature */
|
295 |
s->nsector = 1;
|
296 |
s->sector = 1;
|
297 |
if (s->drive_kind == IDE_CD) {
|
298 |
s->lcyl = 0x14;
|
299 |
s->hcyl = 0xeb;
|
300 |
} else if (s->bs) { |
301 |
s->lcyl = 0;
|
302 |
s->hcyl = 0;
|
303 |
} else {
|
304 |
s->lcyl = 0xff;
|
305 |
s->hcyl = 0xff;
|
306 |
} |
307 |
} |
308 |
|
309 |
typedef struct TrimAIOCB { |
310 |
BlockDriverAIOCB common; |
311 |
QEMUBH *bh; |
312 |
int ret;
|
313 |
} TrimAIOCB; |
314 |
|
315 |
static void trim_aio_cancel(BlockDriverAIOCB *acb) |
316 |
{ |
317 |
TrimAIOCB *iocb = container_of(acb, TrimAIOCB, common); |
318 |
|
319 |
qemu_bh_delete(iocb->bh); |
320 |
iocb->bh = NULL;
|
321 |
qemu_aio_release(iocb); |
322 |
} |
323 |
|
324 |
static AIOPool trim_aio_pool = {
|
325 |
.aiocb_size = sizeof(TrimAIOCB),
|
326 |
.cancel = trim_aio_cancel, |
327 |
}; |
328 |
|
329 |
static void ide_trim_bh_cb(void *opaque) |
330 |
{ |
331 |
TrimAIOCB *iocb = opaque; |
332 |
|
333 |
iocb->common.cb(iocb->common.opaque, iocb->ret); |
334 |
|
335 |
qemu_bh_delete(iocb->bh); |
336 |
iocb->bh = NULL;
|
337 |
|
338 |
qemu_aio_release(iocb); |
339 |
} |
340 |
|
341 |
BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs, |
342 |
int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
|
343 |
BlockDriverCompletionFunc *cb, void *opaque)
|
344 |
{ |
345 |
TrimAIOCB *iocb; |
346 |
int i, j, ret;
|
347 |
|
348 |
iocb = qemu_aio_get(&trim_aio_pool, bs, cb, opaque); |
349 |
iocb->bh = qemu_bh_new(ide_trim_bh_cb, iocb); |
350 |
iocb->ret = 0;
|
351 |
|
352 |
for (j = 0; j < qiov->niov; j++) { |
353 |
uint64_t *buffer = qiov->iov[j].iov_base; |
354 |
|
355 |
for (i = 0; i < qiov->iov[j].iov_len / 8; i++) { |
356 |
/* 6-byte LBA + 2-byte range per entry */
|
357 |
uint64_t entry = le64_to_cpu(buffer[i]); |
358 |
uint64_t sector = entry & 0x0000ffffffffffffULL;
|
359 |
uint16_t count = entry >> 48;
|
360 |
|
361 |
if (count == 0) { |
362 |
break;
|
363 |
} |
364 |
|
365 |
ret = bdrv_discard(bs, sector, count); |
366 |
if (!iocb->ret) {
|
367 |
iocb->ret = ret; |
368 |
} |
369 |
} |
370 |
} |
371 |
|
372 |
qemu_bh_schedule(iocb->bh); |
373 |
|
374 |
return &iocb->common;
|
375 |
} |
376 |
|
377 |
static inline void ide_abort_command(IDEState *s) |
378 |
{ |
379 |
s->status = READY_STAT | ERR_STAT; |
380 |
s->error = ABRT_ERR; |
381 |
} |
382 |
|
383 |
/* prepare data transfer and tell what to do after */
|
384 |
void ide_transfer_start(IDEState *s, uint8_t *buf, int size, |
385 |
EndTransferFunc *end_transfer_func) |
386 |
{ |
387 |
s->end_transfer_func = end_transfer_func; |
388 |
s->data_ptr = buf; |
389 |
s->data_end = buf + size; |
390 |
if (!(s->status & ERR_STAT)) {
|
391 |
s->status |= DRQ_STAT; |
392 |
} |
393 |
s->bus->dma->ops->start_transfer(s->bus->dma); |
394 |
} |
395 |
|
396 |
void ide_transfer_stop(IDEState *s)
|
397 |
{ |
398 |
s->end_transfer_func = ide_transfer_stop; |
399 |
s->data_ptr = s->io_buffer; |
400 |
s->data_end = s->io_buffer; |
401 |
s->status &= ~DRQ_STAT; |
402 |
} |
403 |
|
404 |
int64_t ide_get_sector(IDEState *s) |
405 |
{ |
406 |
int64_t sector_num; |
407 |
if (s->select & 0x40) { |
408 |
/* lba */
|
409 |
if (!s->lba48) {
|
410 |
sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | |
411 |
(s->lcyl << 8) | s->sector;
|
412 |
} else {
|
413 |
sector_num = ((int64_t)s->hob_hcyl << 40) |
|
414 |
((int64_t) s->hob_lcyl << 32) |
|
415 |
((int64_t) s->hob_sector << 24) |
|
416 |
((int64_t) s->hcyl << 16) |
|
417 |
((int64_t) s->lcyl << 8) | s->sector;
|
418 |
} |
419 |
} else {
|
420 |
sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
|
421 |
(s->select & 0x0f) * s->sectors + (s->sector - 1); |
422 |
} |
423 |
return sector_num;
|
424 |
} |
425 |
|
426 |
void ide_set_sector(IDEState *s, int64_t sector_num)
|
427 |
{ |
428 |
unsigned int cyl, r; |
429 |
if (s->select & 0x40) { |
430 |
if (!s->lba48) {
|
431 |
s->select = (s->select & 0xf0) | (sector_num >> 24); |
432 |
s->hcyl = (sector_num >> 16);
|
433 |
s->lcyl = (sector_num >> 8);
|
434 |
s->sector = (sector_num); |
435 |
} else {
|
436 |
s->sector = sector_num; |
437 |
s->lcyl = sector_num >> 8;
|
438 |
s->hcyl = sector_num >> 16;
|
439 |
s->hob_sector = sector_num >> 24;
|
440 |
s->hob_lcyl = sector_num >> 32;
|
441 |
s->hob_hcyl = sector_num >> 40;
|
442 |
} |
443 |
} else {
|
444 |
cyl = sector_num / (s->heads * s->sectors); |
445 |
r = sector_num % (s->heads * s->sectors); |
446 |
s->hcyl = cyl >> 8;
|
447 |
s->lcyl = cyl; |
448 |
s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f); |
449 |
s->sector = (r % s->sectors) + 1;
|
450 |
} |
451 |
} |
452 |
|
453 |
static void ide_rw_error(IDEState *s) { |
454 |
ide_abort_command(s); |
455 |
ide_set_irq(s->bus); |
456 |
} |
457 |
|
458 |
void ide_sector_read(IDEState *s)
|
459 |
{ |
460 |
int64_t sector_num; |
461 |
int ret, n;
|
462 |
|
463 |
s->status = READY_STAT | SEEK_STAT; |
464 |
s->error = 0; /* not needed by IDE spec, but needed by Windows */ |
465 |
sector_num = ide_get_sector(s); |
466 |
n = s->nsector; |
467 |
if (n == 0) { |
468 |
/* no more sector to read from disk */
|
469 |
ide_transfer_stop(s); |
470 |
} else {
|
471 |
#if defined(DEBUG_IDE)
|
472 |
printf("read sector=%" PRId64 "\n", sector_num); |
473 |
#endif
|
474 |
if (n > s->req_nb_sectors)
|
475 |
n = s->req_nb_sectors; |
476 |
ret = bdrv_read(s->bs, sector_num, s->io_buffer, n); |
477 |
if (ret != 0) { |
478 |
if (ide_handle_rw_error(s, -ret,
|
479 |
BM_STATUS_PIO_RETRY | BM_STATUS_RETRY_READ)) |
480 |
{ |
481 |
return;
|
482 |
} |
483 |
} |
484 |
ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
|
485 |
ide_set_irq(s->bus); |
486 |
ide_set_sector(s, sector_num + n); |
487 |
s->nsector -= n; |
488 |
} |
489 |
} |
490 |
|
491 |
static void dma_buf_commit(IDEState *s, int is_write) |
492 |
{ |
493 |
qemu_sglist_destroy(&s->sg); |
494 |
} |
495 |
|
496 |
void ide_set_inactive(IDEState *s)
|
497 |
{ |
498 |
s->bus->dma->aiocb = NULL;
|
499 |
s->bus->dma->ops->set_inactive(s->bus->dma); |
500 |
} |
501 |
|
502 |
void ide_dma_error(IDEState *s)
|
503 |
{ |
504 |
ide_transfer_stop(s); |
505 |
s->error = ABRT_ERR; |
506 |
s->status = READY_STAT | ERR_STAT; |
507 |
ide_set_inactive(s); |
508 |
ide_set_irq(s->bus); |
509 |
} |
510 |
|
511 |
static int ide_handle_rw_error(IDEState *s, int error, int op) |
512 |
{ |
513 |
int is_read = (op & BM_STATUS_RETRY_READ);
|
514 |
BlockErrorAction action = bdrv_get_on_error(s->bs, is_read); |
515 |
|
516 |
if (action == BLOCK_ERR_IGNORE) {
|
517 |
bdrv_mon_event(s->bs, BDRV_ACTION_IGNORE, is_read); |
518 |
return 0; |
519 |
} |
520 |
|
521 |
if ((error == ENOSPC && action == BLOCK_ERR_STOP_ENOSPC)
|
522 |
|| action == BLOCK_ERR_STOP_ANY) { |
523 |
s->bus->dma->ops->set_unit(s->bus->dma, s->unit); |
524 |
s->bus->error_status = op; |
525 |
bdrv_mon_event(s->bs, BDRV_ACTION_STOP, is_read); |
526 |
vm_stop(VMSTOP_DISKFULL); |
527 |
} else {
|
528 |
if (op & BM_STATUS_DMA_RETRY) {
|
529 |
dma_buf_commit(s, 0);
|
530 |
ide_dma_error(s); |
531 |
} else {
|
532 |
ide_rw_error(s); |
533 |
} |
534 |
bdrv_mon_event(s->bs, BDRV_ACTION_REPORT, is_read); |
535 |
} |
536 |
|
537 |
return 1; |
538 |
} |
539 |
|
540 |
void ide_dma_cb(void *opaque, int ret) |
541 |
{ |
542 |
IDEState *s = opaque; |
543 |
int n;
|
544 |
int64_t sector_num; |
545 |
|
546 |
handle_rw_error:
|
547 |
if (ret < 0) { |
548 |
int op = BM_STATUS_DMA_RETRY;
|
549 |
|
550 |
if (s->dma_cmd == IDE_DMA_READ)
|
551 |
op |= BM_STATUS_RETRY_READ; |
552 |
else if (s->dma_cmd == IDE_DMA_TRIM) |
553 |
op |= BM_STATUS_RETRY_TRIM; |
554 |
|
555 |
if (ide_handle_rw_error(s, -ret, op)) {
|
556 |
return;
|
557 |
} |
558 |
} |
559 |
|
560 |
n = s->io_buffer_size >> 9;
|
561 |
sector_num = ide_get_sector(s); |
562 |
if (n > 0) { |
563 |
dma_buf_commit(s, ide_cmd_is_read(s)); |
564 |
sector_num += n; |
565 |
ide_set_sector(s, sector_num); |
566 |
s->nsector -= n; |
567 |
} |
568 |
|
569 |
/* end of transfer ? */
|
570 |
if (s->nsector == 0) { |
571 |
s->status = READY_STAT | SEEK_STAT; |
572 |
ide_set_irq(s->bus); |
573 |
goto eot;
|
574 |
} |
575 |
|
576 |
/* launch next transfer */
|
577 |
n = s->nsector; |
578 |
s->io_buffer_index = 0;
|
579 |
s->io_buffer_size = n * 512;
|
580 |
if (s->bus->dma->ops->prepare_buf(s->bus->dma, ide_cmd_is_read(s)) == 0) { |
581 |
/* The PRDs were too short. Reset the Active bit, but don't raise an
|
582 |
* interrupt. */
|
583 |
goto eot;
|
584 |
} |
585 |
|
586 |
#ifdef DEBUG_AIO
|
587 |
printf("ide_dma_cb: sector_num=%" PRId64 " n=%d, cmd_cmd=%d\n", |
588 |
sector_num, n, s->dma_cmd); |
589 |
#endif
|
590 |
|
591 |
switch (s->dma_cmd) {
|
592 |
case IDE_DMA_READ:
|
593 |
s->bus->dma->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num, |
594 |
ide_dma_cb, s); |
595 |
break;
|
596 |
case IDE_DMA_WRITE:
|
597 |
s->bus->dma->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num, |
598 |
ide_dma_cb, s); |
599 |
break;
|
600 |
case IDE_DMA_TRIM:
|
601 |
s->bus->dma->aiocb = dma_bdrv_io(s->bs, &s->sg, sector_num, |
602 |
ide_issue_trim, ide_dma_cb, s, 1);
|
603 |
break;
|
604 |
} |
605 |
|
606 |
if (!s->bus->dma->aiocb) {
|
607 |
ret = -1;
|
608 |
goto handle_rw_error;
|
609 |
} |
610 |
return;
|
611 |
|
612 |
eot:
|
613 |
ide_set_inactive(s); |
614 |
} |
615 |
|
616 |
static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd) |
617 |
{ |
618 |
s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT; |
619 |
s->io_buffer_index = 0;
|
620 |
s->io_buffer_size = 0;
|
621 |
s->dma_cmd = dma_cmd; |
622 |
s->bus->dma->ops->start_dma(s->bus->dma, s, ide_dma_cb); |
623 |
} |
624 |
|
625 |
static void ide_sector_write_timer_cb(void *opaque) |
626 |
{ |
627 |
IDEState *s = opaque; |
628 |
ide_set_irq(s->bus); |
629 |
} |
630 |
|
631 |
void ide_sector_write(IDEState *s)
|
632 |
{ |
633 |
int64_t sector_num; |
634 |
int ret, n, n1;
|
635 |
|
636 |
s->status = READY_STAT | SEEK_STAT; |
637 |
sector_num = ide_get_sector(s); |
638 |
#if defined(DEBUG_IDE)
|
639 |
printf("write sector=%" PRId64 "\n", sector_num); |
640 |
#endif
|
641 |
n = s->nsector; |
642 |
if (n > s->req_nb_sectors)
|
643 |
n = s->req_nb_sectors; |
644 |
ret = bdrv_write(s->bs, sector_num, s->io_buffer, n); |
645 |
|
646 |
if (ret != 0) { |
647 |
if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY))
|
648 |
return;
|
649 |
} |
650 |
|
651 |
s->nsector -= n; |
652 |
if (s->nsector == 0) { |
653 |
/* no more sectors to write */
|
654 |
ide_transfer_stop(s); |
655 |
} else {
|
656 |
n1 = s->nsector; |
657 |
if (n1 > s->req_nb_sectors)
|
658 |
n1 = s->req_nb_sectors; |
659 |
ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
|
660 |
} |
661 |
ide_set_sector(s, sector_num + n); |
662 |
|
663 |
if (win2k_install_hack && ((++s->irq_count % 16) == 0)) { |
664 |
/* It seems there is a bug in the Windows 2000 installer HDD
|
665 |
IDE driver which fills the disk with empty logs when the
|
666 |
IDE write IRQ comes too early. This hack tries to correct
|
667 |
that at the expense of slower write performances. Use this
|
668 |
option _only_ to install Windows 2000. You must disable it
|
669 |
for normal use. */
|
670 |
qemu_mod_timer(s->sector_write_timer, |
671 |
qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
|
672 |
} else {
|
673 |
ide_set_irq(s->bus); |
674 |
} |
675 |
} |
676 |
|
677 |
static void ide_flush_cb(void *opaque, int ret) |
678 |
{ |
679 |
IDEState *s = opaque; |
680 |
|
681 |
if (ret < 0) { |
682 |
/* XXX: What sector number to set here? */
|
683 |
if (ide_handle_rw_error(s, -ret, BM_STATUS_RETRY_FLUSH)) {
|
684 |
return;
|
685 |
} |
686 |
} |
687 |
|
688 |
s->status = READY_STAT | SEEK_STAT; |
689 |
ide_set_irq(s->bus); |
690 |
} |
691 |
|
692 |
void ide_flush_cache(IDEState *s)
|
693 |
{ |
694 |
BlockDriverAIOCB *acb; |
695 |
|
696 |
if (s->bs == NULL) { |
697 |
ide_flush_cb(s, 0);
|
698 |
return;
|
699 |
} |
700 |
|
701 |
acb = bdrv_aio_flush(s->bs, ide_flush_cb, s); |
702 |
if (acb == NULL) { |
703 |
ide_flush_cb(s, -EIO); |
704 |
} |
705 |
} |
706 |
|
707 |
static void ide_cfata_metadata_inquiry(IDEState *s) |
708 |
{ |
709 |
uint16_t *p; |
710 |
uint32_t spd; |
711 |
|
712 |
p = (uint16_t *) s->io_buffer; |
713 |
memset(p, 0, 0x200); |
714 |
spd = ((s->mdata_size - 1) >> 9) + 1; |
715 |
|
716 |
put_le16(p + 0, 0x0001); /* Data format revision */ |
717 |
put_le16(p + 1, 0x0000); /* Media property: silicon */ |
718 |
put_le16(p + 2, s->media_changed); /* Media status */ |
719 |
put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */ |
720 |
put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */ |
721 |
put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */ |
722 |
put_le16(p + 6, spd >> 16); /* Sectors per device (high) */ |
723 |
} |
724 |
|
725 |
static void ide_cfata_metadata_read(IDEState *s) |
726 |
{ |
727 |
uint16_t *p; |
728 |
|
729 |
if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) { |
730 |
s->status = ERR_STAT; |
731 |
s->error = ABRT_ERR; |
732 |
return;
|
733 |
} |
734 |
|
735 |
p = (uint16_t *) s->io_buffer; |
736 |
memset(p, 0, 0x200); |
737 |
|
738 |
put_le16(p + 0, s->media_changed); /* Media status */ |
739 |
memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9), |
740 |
MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9), |
741 |
s->nsector << 9), 0x200 - 2)); |
742 |
} |
743 |
|
744 |
static void ide_cfata_metadata_write(IDEState *s) |
745 |
{ |
746 |
if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) { |
747 |
s->status = ERR_STAT; |
748 |
s->error = ABRT_ERR; |
749 |
return;
|
750 |
} |
751 |
|
752 |
s->media_changed = 0;
|
753 |
|
754 |
memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9), |
755 |
s->io_buffer + 2,
|
756 |
MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9), |
757 |
s->nsector << 9), 0x200 - 2)); |
758 |
} |
759 |
|
760 |
/* called when the inserted state of the media has changed */
|
761 |
static void cdrom_change_cb(void *opaque, int reason) |
762 |
{ |
763 |
IDEState *s = opaque; |
764 |
uint64_t nb_sectors; |
765 |
|
766 |
if (!(reason & CHANGE_MEDIA)) {
|
767 |
return;
|
768 |
} |
769 |
|
770 |
bdrv_get_geometry(s->bs, &nb_sectors); |
771 |
s->nb_sectors = nb_sectors; |
772 |
|
773 |
/*
|
774 |
* First indicate to the guest that a CD has been removed. That's
|
775 |
* done on the next command the guest sends us.
|
776 |
*
|
777 |
* Then we set SENSE_UNIT_ATTENTION, by which the guest will
|
778 |
* detect a new CD in the drive. See ide_atapi_cmd() for details.
|
779 |
*/
|
780 |
s->cdrom_changed = 1;
|
781 |
s->events.new_media = true;
|
782 |
ide_set_irq(s->bus); |
783 |
} |
784 |
|
785 |
static void ide_cmd_lba48_transform(IDEState *s, int lba48) |
786 |
{ |
787 |
s->lba48 = lba48; |
788 |
|
789 |
/* handle the 'magic' 0 nsector count conversion here. to avoid
|
790 |
* fiddling with the rest of the read logic, we just store the
|
791 |
* full sector count in ->nsector and ignore ->hob_nsector from now
|
792 |
*/
|
793 |
if (!s->lba48) {
|
794 |
if (!s->nsector)
|
795 |
s->nsector = 256;
|
796 |
} else {
|
797 |
if (!s->nsector && !s->hob_nsector)
|
798 |
s->nsector = 65536;
|
799 |
else {
|
800 |
int lo = s->nsector;
|
801 |
int hi = s->hob_nsector;
|
802 |
|
803 |
s->nsector = (hi << 8) | lo;
|
804 |
} |
805 |
} |
806 |
} |
807 |
|
808 |
static void ide_clear_hob(IDEBus *bus) |
809 |
{ |
810 |
/* any write clears HOB high bit of device control register */
|
811 |
bus->ifs[0].select &= ~(1 << 7); |
812 |
bus->ifs[1].select &= ~(1 << 7); |
813 |
} |
814 |
|
815 |
void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
816 |
{ |
817 |
IDEBus *bus = opaque; |
818 |
|
819 |
#ifdef DEBUG_IDE
|
820 |
printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
|
821 |
#endif
|
822 |
|
823 |
addr &= 7;
|
824 |
|
825 |
/* ignore writes to command block while busy with previous command */
|
826 |
if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT))) |
827 |
return;
|
828 |
|
829 |
switch(addr) {
|
830 |
case 0: |
831 |
break;
|
832 |
case 1: |
833 |
ide_clear_hob(bus); |
834 |
/* NOTE: data is written to the two drives */
|
835 |
bus->ifs[0].hob_feature = bus->ifs[0].feature; |
836 |
bus->ifs[1].hob_feature = bus->ifs[1].feature; |
837 |
bus->ifs[0].feature = val;
|
838 |
bus->ifs[1].feature = val;
|
839 |
break;
|
840 |
case 2: |
841 |
ide_clear_hob(bus); |
842 |
bus->ifs[0].hob_nsector = bus->ifs[0].nsector; |
843 |
bus->ifs[1].hob_nsector = bus->ifs[1].nsector; |
844 |
bus->ifs[0].nsector = val;
|
845 |
bus->ifs[1].nsector = val;
|
846 |
break;
|
847 |
case 3: |
848 |
ide_clear_hob(bus); |
849 |
bus->ifs[0].hob_sector = bus->ifs[0].sector; |
850 |
bus->ifs[1].hob_sector = bus->ifs[1].sector; |
851 |
bus->ifs[0].sector = val;
|
852 |
bus->ifs[1].sector = val;
|
853 |
break;
|
854 |
case 4: |
855 |
ide_clear_hob(bus); |
856 |
bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl; |
857 |
bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl; |
858 |
bus->ifs[0].lcyl = val;
|
859 |
bus->ifs[1].lcyl = val;
|
860 |
break;
|
861 |
case 5: |
862 |
ide_clear_hob(bus); |
863 |
bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl; |
864 |
bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl; |
865 |
bus->ifs[0].hcyl = val;
|
866 |
bus->ifs[1].hcyl = val;
|
867 |
break;
|
868 |
case 6: |
869 |
/* FIXME: HOB readback uses bit 7 */
|
870 |
bus->ifs[0].select = (val & ~0x10) | 0xa0; |
871 |
bus->ifs[1].select = (val | 0x10) | 0xa0; |
872 |
/* select drive */
|
873 |
bus->unit = (val >> 4) & 1; |
874 |
break;
|
875 |
default:
|
876 |
case 7: |
877 |
/* command */
|
878 |
ide_exec_cmd(bus, val); |
879 |
break;
|
880 |
} |
881 |
} |
882 |
|
883 |
|
884 |
void ide_exec_cmd(IDEBus *bus, uint32_t val)
|
885 |
{ |
886 |
IDEState *s; |
887 |
int n;
|
888 |
int lba48 = 0; |
889 |
|
890 |
#if defined(DEBUG_IDE)
|
891 |
printf("ide: CMD=%02x\n", val);
|
892 |
#endif
|
893 |
s = idebus_active_if(bus); |
894 |
/* ignore commands to non existant slave */
|
895 |
if (s != bus->ifs && !s->bs)
|
896 |
return;
|
897 |
|
898 |
/* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
|
899 |
if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET)
|
900 |
return;
|
901 |
|
902 |
switch(val) {
|
903 |
case WIN_DSM:
|
904 |
switch (s->feature) {
|
905 |
case DSM_TRIM:
|
906 |
if (!s->bs) {
|
907 |
goto abort_cmd;
|
908 |
} |
909 |
ide_sector_start_dma(s, IDE_DMA_TRIM); |
910 |
break;
|
911 |
default:
|
912 |
goto abort_cmd;
|
913 |
} |
914 |
break;
|
915 |
case WIN_IDENTIFY:
|
916 |
if (s->bs && s->drive_kind != IDE_CD) {
|
917 |
if (s->drive_kind != IDE_CFATA)
|
918 |
ide_identify(s); |
919 |
else
|
920 |
ide_cfata_identify(s); |
921 |
s->status = READY_STAT | SEEK_STAT; |
922 |
ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
|
923 |
} else {
|
924 |
if (s->drive_kind == IDE_CD) {
|
925 |
ide_set_signature(s); |
926 |
} |
927 |
ide_abort_command(s); |
928 |
} |
929 |
ide_set_irq(s->bus); |
930 |
break;
|
931 |
case WIN_SPECIFY:
|
932 |
case WIN_RECAL:
|
933 |
s->error = 0;
|
934 |
s->status = READY_STAT | SEEK_STAT; |
935 |
ide_set_irq(s->bus); |
936 |
break;
|
937 |
case WIN_SETMULT:
|
938 |
if (s->drive_kind == IDE_CFATA && s->nsector == 0) { |
939 |
/* Disable Read and Write Multiple */
|
940 |
s->mult_sectors = 0;
|
941 |
s->status = READY_STAT | SEEK_STAT; |
942 |
} else if ((s->nsector & 0xff) != 0 && |
943 |
((s->nsector & 0xff) > MAX_MULT_SECTORS ||
|
944 |
(s->nsector & (s->nsector - 1)) != 0)) { |
945 |
ide_abort_command(s); |
946 |
} else {
|
947 |
s->mult_sectors = s->nsector & 0xff;
|
948 |
s->status = READY_STAT | SEEK_STAT; |
949 |
} |
950 |
ide_set_irq(s->bus); |
951 |
break;
|
952 |
case WIN_VERIFY_EXT:
|
953 |
lba48 = 1;
|
954 |
case WIN_VERIFY:
|
955 |
case WIN_VERIFY_ONCE:
|
956 |
/* do sector number check ? */
|
957 |
ide_cmd_lba48_transform(s, lba48); |
958 |
s->status = READY_STAT | SEEK_STAT; |
959 |
ide_set_irq(s->bus); |
960 |
break;
|
961 |
case WIN_READ_EXT:
|
962 |
lba48 = 1;
|
963 |
case WIN_READ:
|
964 |
case WIN_READ_ONCE:
|
965 |
if (!s->bs)
|
966 |
goto abort_cmd;
|
967 |
ide_cmd_lba48_transform(s, lba48); |
968 |
s->req_nb_sectors = 1;
|
969 |
ide_sector_read(s); |
970 |
break;
|
971 |
case WIN_WRITE_EXT:
|
972 |
lba48 = 1;
|
973 |
case WIN_WRITE:
|
974 |
case WIN_WRITE_ONCE:
|
975 |
case CFA_WRITE_SECT_WO_ERASE:
|
976 |
case WIN_WRITE_VERIFY:
|
977 |
ide_cmd_lba48_transform(s, lba48); |
978 |
s->error = 0;
|
979 |
s->status = SEEK_STAT | READY_STAT; |
980 |
s->req_nb_sectors = 1;
|
981 |
ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
|
982 |
s->media_changed = 1;
|
983 |
break;
|
984 |
case WIN_MULTREAD_EXT:
|
985 |
lba48 = 1;
|
986 |
case WIN_MULTREAD:
|
987 |
if (!s->mult_sectors)
|
988 |
goto abort_cmd;
|
989 |
ide_cmd_lba48_transform(s, lba48); |
990 |
s->req_nb_sectors = s->mult_sectors; |
991 |
ide_sector_read(s); |
992 |
break;
|
993 |
case WIN_MULTWRITE_EXT:
|
994 |
lba48 = 1;
|
995 |
case WIN_MULTWRITE:
|
996 |
case CFA_WRITE_MULTI_WO_ERASE:
|
997 |
if (!s->mult_sectors)
|
998 |
goto abort_cmd;
|
999 |
ide_cmd_lba48_transform(s, lba48); |
1000 |
s->error = 0;
|
1001 |
s->status = SEEK_STAT | READY_STAT; |
1002 |
s->req_nb_sectors = s->mult_sectors; |
1003 |
n = s->nsector; |
1004 |
if (n > s->req_nb_sectors)
|
1005 |
n = s->req_nb_sectors; |
1006 |
ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
|
1007 |
s->media_changed = 1;
|
1008 |
break;
|
1009 |
case WIN_READDMA_EXT:
|
1010 |
lba48 = 1;
|
1011 |
case WIN_READDMA:
|
1012 |
case WIN_READDMA_ONCE:
|
1013 |
if (!s->bs)
|
1014 |
goto abort_cmd;
|
1015 |
ide_cmd_lba48_transform(s, lba48); |
1016 |
ide_sector_start_dma(s, IDE_DMA_READ); |
1017 |
break;
|
1018 |
case WIN_WRITEDMA_EXT:
|
1019 |
lba48 = 1;
|
1020 |
case WIN_WRITEDMA:
|
1021 |
case WIN_WRITEDMA_ONCE:
|
1022 |
if (!s->bs)
|
1023 |
goto abort_cmd;
|
1024 |
ide_cmd_lba48_transform(s, lba48); |
1025 |
ide_sector_start_dma(s, IDE_DMA_WRITE); |
1026 |
s->media_changed = 1;
|
1027 |
break;
|
1028 |
case WIN_READ_NATIVE_MAX_EXT:
|
1029 |
lba48 = 1;
|
1030 |
case WIN_READ_NATIVE_MAX:
|
1031 |
ide_cmd_lba48_transform(s, lba48); |
1032 |
ide_set_sector(s, s->nb_sectors - 1);
|
1033 |
s->status = READY_STAT | SEEK_STAT; |
1034 |
ide_set_irq(s->bus); |
1035 |
break;
|
1036 |
case WIN_CHECKPOWERMODE1:
|
1037 |
case WIN_CHECKPOWERMODE2:
|
1038 |
s->error = 0;
|
1039 |
s->nsector = 0xff; /* device active or idle */ |
1040 |
s->status = READY_STAT | SEEK_STAT; |
1041 |
ide_set_irq(s->bus); |
1042 |
break;
|
1043 |
case WIN_SETFEATURES:
|
1044 |
if (!s->bs)
|
1045 |
goto abort_cmd;
|
1046 |
/* XXX: valid for CDROM ? */
|
1047 |
switch(s->feature) {
|
1048 |
case 0xcc: /* reverting to power-on defaults enable */ |
1049 |
case 0x66: /* reverting to power-on defaults disable */ |
1050 |
case 0x02: /* write cache enable */ |
1051 |
case 0x82: /* write cache disable */ |
1052 |
case 0xaa: /* read look-ahead enable */ |
1053 |
case 0x55: /* read look-ahead disable */ |
1054 |
case 0x05: /* set advanced power management mode */ |
1055 |
case 0x85: /* disable advanced power management mode */ |
1056 |
case 0x69: /* NOP */ |
1057 |
case 0x67: /* NOP */ |
1058 |
case 0x96: /* NOP */ |
1059 |
case 0x9a: /* NOP */ |
1060 |
case 0x42: /* enable Automatic Acoustic Mode */ |
1061 |
case 0xc2: /* disable Automatic Acoustic Mode */ |
1062 |
s->status = READY_STAT | SEEK_STAT; |
1063 |
ide_set_irq(s->bus); |
1064 |
break;
|
1065 |
case 0x03: { /* set transfer mode */ |
1066 |
uint8_t val = s->nsector & 0x07;
|
1067 |
uint16_t *identify_data = (uint16_t *)s->identify_data; |
1068 |
|
1069 |
switch (s->nsector >> 3) { |
1070 |
case 0x00: /* pio default */ |
1071 |
case 0x01: /* pio mode */ |
1072 |
put_le16(identify_data + 62,0x07); |
1073 |
put_le16(identify_data + 63,0x07); |
1074 |
put_le16(identify_data + 88,0x3f); |
1075 |
break;
|
1076 |
case 0x02: /* sigle word dma mode*/ |
1077 |
put_le16(identify_data + 62,0x07 | (1 << (val + 8))); |
1078 |
put_le16(identify_data + 63,0x07); |
1079 |
put_le16(identify_data + 88,0x3f); |
1080 |
break;
|
1081 |
case 0x04: /* mdma mode */ |
1082 |
put_le16(identify_data + 62,0x07); |
1083 |
put_le16(identify_data + 63,0x07 | (1 << (val + 8))); |
1084 |
put_le16(identify_data + 88,0x3f); |
1085 |
break;
|
1086 |
case 0x08: /* udma mode */ |
1087 |
put_le16(identify_data + 62,0x07); |
1088 |
put_le16(identify_data + 63,0x07); |
1089 |
put_le16(identify_data + 88,0x3f | (1 << (val + 8))); |
1090 |
break;
|
1091 |
default:
|
1092 |
goto abort_cmd;
|
1093 |
} |
1094 |
s->status = READY_STAT | SEEK_STAT; |
1095 |
ide_set_irq(s->bus); |
1096 |
break;
|
1097 |
} |
1098 |
default:
|
1099 |
goto abort_cmd;
|
1100 |
} |
1101 |
break;
|
1102 |
case WIN_FLUSH_CACHE:
|
1103 |
case WIN_FLUSH_CACHE_EXT:
|
1104 |
ide_flush_cache(s); |
1105 |
break;
|
1106 |
case WIN_STANDBY:
|
1107 |
case WIN_STANDBY2:
|
1108 |
case WIN_STANDBYNOW1:
|
1109 |
case WIN_STANDBYNOW2:
|
1110 |
case WIN_IDLEIMMEDIATE:
|
1111 |
case CFA_IDLEIMMEDIATE:
|
1112 |
case WIN_SETIDLE1:
|
1113 |
case WIN_SETIDLE2:
|
1114 |
case WIN_SLEEPNOW1:
|
1115 |
case WIN_SLEEPNOW2:
|
1116 |
s->status = READY_STAT; |
1117 |
ide_set_irq(s->bus); |
1118 |
break;
|
1119 |
case WIN_SEEK:
|
1120 |
if(s->drive_kind == IDE_CD)
|
1121 |
goto abort_cmd;
|
1122 |
/* XXX: Check that seek is within bounds */
|
1123 |
s->status = READY_STAT | SEEK_STAT; |
1124 |
ide_set_irq(s->bus); |
1125 |
break;
|
1126 |
/* ATAPI commands */
|
1127 |
case WIN_PIDENTIFY:
|
1128 |
if (s->drive_kind == IDE_CD) {
|
1129 |
ide_atapi_identify(s); |
1130 |
s->status = READY_STAT | SEEK_STAT; |
1131 |
ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
|
1132 |
} else {
|
1133 |
ide_abort_command(s); |
1134 |
} |
1135 |
ide_set_irq(s->bus); |
1136 |
break;
|
1137 |
case WIN_DIAGNOSE:
|
1138 |
ide_set_signature(s); |
1139 |
if (s->drive_kind == IDE_CD)
|
1140 |
s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet |
1141 |
* devices to return a clear status register
|
1142 |
* with READY_STAT *not* set. */
|
1143 |
else
|
1144 |
s->status = READY_STAT | SEEK_STAT; |
1145 |
s->error = 0x01; /* Device 0 passed, Device 1 passed or not |
1146 |
* present.
|
1147 |
*/
|
1148 |
ide_set_irq(s->bus); |
1149 |
break;
|
1150 |
case WIN_SRST:
|
1151 |
if (s->drive_kind != IDE_CD)
|
1152 |
goto abort_cmd;
|
1153 |
ide_set_signature(s); |
1154 |
s->status = 0x00; /* NOTE: READY is _not_ set */ |
1155 |
s->error = 0x01;
|
1156 |
break;
|
1157 |
case WIN_PACKETCMD:
|
1158 |
if (s->drive_kind != IDE_CD)
|
1159 |
goto abort_cmd;
|
1160 |
/* overlapping commands not supported */
|
1161 |
if (s->feature & 0x02) |
1162 |
goto abort_cmd;
|
1163 |
s->status = READY_STAT | SEEK_STAT; |
1164 |
s->atapi_dma = s->feature & 1;
|
1165 |
s->nsector = 1;
|
1166 |
ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, |
1167 |
ide_atapi_cmd); |
1168 |
break;
|
1169 |
/* CF-ATA commands */
|
1170 |
case CFA_REQ_EXT_ERROR_CODE:
|
1171 |
if (s->drive_kind != IDE_CFATA)
|
1172 |
goto abort_cmd;
|
1173 |
s->error = 0x09; /* miscellaneous error */ |
1174 |
s->status = READY_STAT | SEEK_STAT; |
1175 |
ide_set_irq(s->bus); |
1176 |
break;
|
1177 |
case CFA_ERASE_SECTORS:
|
1178 |
case CFA_WEAR_LEVEL:
|
1179 |
if (s->drive_kind != IDE_CFATA)
|
1180 |
goto abort_cmd;
|
1181 |
if (val == CFA_WEAR_LEVEL)
|
1182 |
s->nsector = 0;
|
1183 |
if (val == CFA_ERASE_SECTORS)
|
1184 |
s->media_changed = 1;
|
1185 |
s->error = 0x00;
|
1186 |
s->status = READY_STAT | SEEK_STAT; |
1187 |
ide_set_irq(s->bus); |
1188 |
break;
|
1189 |
case CFA_TRANSLATE_SECTOR:
|
1190 |
if (s->drive_kind != IDE_CFATA)
|
1191 |
goto abort_cmd;
|
1192 |
s->error = 0x00;
|
1193 |
s->status = READY_STAT | SEEK_STAT; |
1194 |
memset(s->io_buffer, 0, 0x200); |
1195 |
s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */ |
1196 |
s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */ |
1197 |
s->io_buffer[0x02] = s->select; /* Head */ |
1198 |
s->io_buffer[0x03] = s->sector; /* Sector */ |
1199 |
s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */ |
1200 |
s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */ |
1201 |
s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */ |
1202 |
s->io_buffer[0x13] = 0x00; /* Erase flag */ |
1203 |
s->io_buffer[0x18] = 0x00; /* Hot count */ |
1204 |
s->io_buffer[0x19] = 0x00; /* Hot count */ |
1205 |
s->io_buffer[0x1a] = 0x01; /* Hot count */ |
1206 |
ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
|
1207 |
ide_set_irq(s->bus); |
1208 |
break;
|
1209 |
case CFA_ACCESS_METADATA_STORAGE:
|
1210 |
if (s->drive_kind != IDE_CFATA)
|
1211 |
goto abort_cmd;
|
1212 |
switch (s->feature) {
|
1213 |
case 0x02: /* Inquiry Metadata Storage */ |
1214 |
ide_cfata_metadata_inquiry(s); |
1215 |
break;
|
1216 |
case 0x03: /* Read Metadata Storage */ |
1217 |
ide_cfata_metadata_read(s); |
1218 |
break;
|
1219 |
case 0x04: /* Write Metadata Storage */ |
1220 |
ide_cfata_metadata_write(s); |
1221 |
break;
|
1222 |
default:
|
1223 |
goto abort_cmd;
|
1224 |
} |
1225 |
ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
|
1226 |
s->status = 0x00; /* NOTE: READY is _not_ set */ |
1227 |
ide_set_irq(s->bus); |
1228 |
break;
|
1229 |
case IBM_SENSE_CONDITION:
|
1230 |
if (s->drive_kind != IDE_CFATA)
|
1231 |
goto abort_cmd;
|
1232 |
switch (s->feature) {
|
1233 |
case 0x01: /* sense temperature in device */ |
1234 |
s->nsector = 0x50; /* +20 C */ |
1235 |
break;
|
1236 |
default:
|
1237 |
goto abort_cmd;
|
1238 |
} |
1239 |
s->status = READY_STAT | SEEK_STAT; |
1240 |
ide_set_irq(s->bus); |
1241 |
break;
|
1242 |
|
1243 |
case WIN_SMART:
|
1244 |
if (s->drive_kind == IDE_CD)
|
1245 |
goto abort_cmd;
|
1246 |
if (s->hcyl != 0xc2 || s->lcyl != 0x4f) |
1247 |
goto abort_cmd;
|
1248 |
if (!s->smart_enabled && s->feature != SMART_ENABLE)
|
1249 |
goto abort_cmd;
|
1250 |
switch (s->feature) {
|
1251 |
case SMART_DISABLE:
|
1252 |
s->smart_enabled = 0;
|
1253 |
s->status = READY_STAT | SEEK_STAT; |
1254 |
ide_set_irq(s->bus); |
1255 |
break;
|
1256 |
case SMART_ENABLE:
|
1257 |
s->smart_enabled = 1;
|
1258 |
s->status = READY_STAT | SEEK_STAT; |
1259 |
ide_set_irq(s->bus); |
1260 |
break;
|
1261 |
case SMART_ATTR_AUTOSAVE:
|
1262 |
switch (s->sector) {
|
1263 |
case 0x00: |
1264 |
s->smart_autosave = 0;
|
1265 |
break;
|
1266 |
case 0xf1: |
1267 |
s->smart_autosave = 1;
|
1268 |
break;
|
1269 |
default:
|
1270 |
goto abort_cmd;
|
1271 |
} |
1272 |
s->status = READY_STAT | SEEK_STAT; |
1273 |
ide_set_irq(s->bus); |
1274 |
break;
|
1275 |
case SMART_STATUS:
|
1276 |
if (!s->smart_errors) {
|
1277 |
s->hcyl = 0xc2;
|
1278 |
s->lcyl = 0x4f;
|
1279 |
} else {
|
1280 |
s->hcyl = 0x2c;
|
1281 |
s->lcyl = 0xf4;
|
1282 |
} |
1283 |
s->status = READY_STAT | SEEK_STAT; |
1284 |
ide_set_irq(s->bus); |
1285 |
break;
|
1286 |
case SMART_READ_THRESH:
|
1287 |
memset(s->io_buffer, 0, 0x200); |
1288 |
s->io_buffer[0] = 0x01; /* smart struct version */ |
1289 |
for (n=0; n<30; n++) { |
1290 |
if (smart_attributes[n][0] == 0) |
1291 |
break;
|
1292 |
s->io_buffer[2+0+(n*12)] = smart_attributes[n][0]; |
1293 |
s->io_buffer[2+1+(n*12)] = smart_attributes[n][11]; |
1294 |
} |
1295 |
for (n=0; n<511; n++) /* checksum */ |
1296 |
s->io_buffer[511] += s->io_buffer[n];
|
1297 |
s->io_buffer[511] = 0x100 - s->io_buffer[511]; |
1298 |
s->status = READY_STAT | SEEK_STAT; |
1299 |
ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
|
1300 |
ide_set_irq(s->bus); |
1301 |
break;
|
1302 |
case SMART_READ_DATA:
|
1303 |
memset(s->io_buffer, 0, 0x200); |
1304 |
s->io_buffer[0] = 0x01; /* smart struct version */ |
1305 |
for (n=0; n<30; n++) { |
1306 |
if (smart_attributes[n][0] == 0) { |
1307 |
break;
|
1308 |
} |
1309 |
int i;
|
1310 |
for(i = 0; i < 11; i++) { |
1311 |
s->io_buffer[2+i+(n*12)] = smart_attributes[n][i]; |
1312 |
} |
1313 |
} |
1314 |
s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00); |
1315 |
if (s->smart_selftest_count == 0) { |
1316 |
s->io_buffer[363] = 0; |
1317 |
} else {
|
1318 |
s->io_buffer[363] =
|
1319 |
s->smart_selftest_data[3 +
|
1320 |
(s->smart_selftest_count - 1) *
|
1321 |
24];
|
1322 |
} |
1323 |
s->io_buffer[364] = 0x20; |
1324 |
s->io_buffer[365] = 0x01; |
1325 |
/* offline data collection capacity: execute + self-test*/
|
1326 |
s->io_buffer[367] = (1<<4 | 1<<3 | 1); |
1327 |
s->io_buffer[368] = 0x03; /* smart capability (1) */ |
1328 |
s->io_buffer[369] = 0x00; /* smart capability (2) */ |
1329 |
s->io_buffer[370] = 0x01; /* error logging supported */ |
1330 |
s->io_buffer[372] = 0x02; /* minutes for poll short test */ |
1331 |
s->io_buffer[373] = 0x36; /* minutes for poll ext test */ |
1332 |
s->io_buffer[374] = 0x01; /* minutes for poll conveyance */ |
1333 |
|
1334 |
for (n=0; n<511; n++) |
1335 |
s->io_buffer[511] += s->io_buffer[n];
|
1336 |
s->io_buffer[511] = 0x100 - s->io_buffer[511]; |
1337 |
s->status = READY_STAT | SEEK_STAT; |
1338 |
ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
|
1339 |
ide_set_irq(s->bus); |
1340 |
break;
|
1341 |
case SMART_READ_LOG:
|
1342 |
switch (s->sector) {
|
1343 |
case 0x01: /* summary smart error log */ |
1344 |
memset(s->io_buffer, 0, 0x200); |
1345 |
s->io_buffer[0] = 0x01; |
1346 |
s->io_buffer[1] = 0x00; /* no error entries */ |
1347 |
s->io_buffer[452] = s->smart_errors & 0xff; |
1348 |
s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8; |
1349 |
|
1350 |
for (n=0; n<511; n++) |
1351 |
s->io_buffer[511] += s->io_buffer[n];
|
1352 |
s->io_buffer[511] = 0x100 - s->io_buffer[511]; |
1353 |
break;
|
1354 |
case 0x06: /* smart self test log */ |
1355 |
memset(s->io_buffer, 0, 0x200); |
1356 |
s->io_buffer[0] = 0x01; |
1357 |
if (s->smart_selftest_count == 0) { |
1358 |
s->io_buffer[508] = 0; |
1359 |
} else {
|
1360 |
s->io_buffer[508] = s->smart_selftest_count;
|
1361 |
for (n=2; n<506; n++) |
1362 |
s->io_buffer[n] = s->smart_selftest_data[n]; |
1363 |
} |
1364 |
for (n=0; n<511; n++) |
1365 |
s->io_buffer[511] += s->io_buffer[n];
|
1366 |
s->io_buffer[511] = 0x100 - s->io_buffer[511]; |
1367 |
break;
|
1368 |
default:
|
1369 |
goto abort_cmd;
|
1370 |
} |
1371 |
s->status = READY_STAT | SEEK_STAT; |
1372 |
ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
|
1373 |
ide_set_irq(s->bus); |
1374 |
break;
|
1375 |
case SMART_EXECUTE_OFFLINE:
|
1376 |
switch (s->sector) {
|
1377 |
case 0: /* off-line routine */ |
1378 |
case 1: /* short self test */ |
1379 |
case 2: /* extended self test */ |
1380 |
s->smart_selftest_count++; |
1381 |
if(s->smart_selftest_count > 21) |
1382 |
s->smart_selftest_count = 0;
|
1383 |
n = 2 + (s->smart_selftest_count - 1) * 24; |
1384 |
s->smart_selftest_data[n] = s->sector; |
1385 |
s->smart_selftest_data[n+1] = 0x00; /* OK and finished */ |
1386 |
s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */ |
1387 |
s->smart_selftest_data[n+3] = 0x12; /* hour count msb */ |
1388 |
s->status = READY_STAT | SEEK_STAT; |
1389 |
ide_set_irq(s->bus); |
1390 |
break;
|
1391 |
default:
|
1392 |
goto abort_cmd;
|
1393 |
} |
1394 |
break;
|
1395 |
default:
|
1396 |
goto abort_cmd;
|
1397 |
} |
1398 |
break;
|
1399 |
default:
|
1400 |
abort_cmd:
|
1401 |
ide_abort_command(s); |
1402 |
ide_set_irq(s->bus); |
1403 |
break;
|
1404 |
} |
1405 |
} |
1406 |
|
1407 |
uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
|
1408 |
{ |
1409 |
IDEBus *bus = opaque; |
1410 |
IDEState *s = idebus_active_if(bus); |
1411 |
uint32_t addr; |
1412 |
int ret, hob;
|
1413 |
|
1414 |
addr = addr1 & 7;
|
1415 |
/* FIXME: HOB readback uses bit 7, but it's always set right now */
|
1416 |
//hob = s->select & (1 << 7);
|
1417 |
hob = 0;
|
1418 |
switch(addr) {
|
1419 |
case 0: |
1420 |
ret = 0xff;
|
1421 |
break;
|
1422 |
case 1: |
1423 |
if ((!bus->ifs[0].bs && !bus->ifs[1].bs) || |
1424 |
(s != bus->ifs && !s->bs)) |
1425 |
ret = 0;
|
1426 |
else if (!hob) |
1427 |
ret = s->error; |
1428 |
else
|
1429 |
ret = s->hob_feature; |
1430 |
break;
|
1431 |
case 2: |
1432 |
if (!bus->ifs[0].bs && !bus->ifs[1].bs) |
1433 |
ret = 0;
|
1434 |
else if (!hob) |
1435 |
ret = s->nsector & 0xff;
|
1436 |
else
|
1437 |
ret = s->hob_nsector; |
1438 |
break;
|
1439 |
case 3: |
1440 |
if (!bus->ifs[0].bs && !bus->ifs[1].bs) |
1441 |
ret = 0;
|
1442 |
else if (!hob) |
1443 |
ret = s->sector; |
1444 |
else
|
1445 |
ret = s->hob_sector; |
1446 |
break;
|
1447 |
case 4: |
1448 |
if (!bus->ifs[0].bs && !bus->ifs[1].bs) |
1449 |
ret = 0;
|
1450 |
else if (!hob) |
1451 |
ret = s->lcyl; |
1452 |
else
|
1453 |
ret = s->hob_lcyl; |
1454 |
break;
|
1455 |
case 5: |
1456 |
if (!bus->ifs[0].bs && !bus->ifs[1].bs) |
1457 |
ret = 0;
|
1458 |
else if (!hob) |
1459 |
ret = s->hcyl; |
1460 |
else
|
1461 |
ret = s->hob_hcyl; |
1462 |
break;
|
1463 |
case 6: |
1464 |
if (!bus->ifs[0].bs && !bus->ifs[1].bs) |
1465 |
ret = 0;
|
1466 |
else
|
1467 |
ret = s->select; |
1468 |
break;
|
1469 |
default:
|
1470 |
case 7: |
1471 |
if ((!bus->ifs[0].bs && !bus->ifs[1].bs) || |
1472 |
(s != bus->ifs && !s->bs)) |
1473 |
ret = 0;
|
1474 |
else
|
1475 |
ret = s->status; |
1476 |
qemu_irq_lower(bus->irq); |
1477 |
break;
|
1478 |
} |
1479 |
#ifdef DEBUG_IDE
|
1480 |
printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
|
1481 |
#endif
|
1482 |
return ret;
|
1483 |
} |
1484 |
|
1485 |
uint32_t ide_status_read(void *opaque, uint32_t addr)
|
1486 |
{ |
1487 |
IDEBus *bus = opaque; |
1488 |
IDEState *s = idebus_active_if(bus); |
1489 |
int ret;
|
1490 |
|
1491 |
if ((!bus->ifs[0].bs && !bus->ifs[1].bs) || |
1492 |
(s != bus->ifs && !s->bs)) |
1493 |
ret = 0;
|
1494 |
else
|
1495 |
ret = s->status; |
1496 |
#ifdef DEBUG_IDE
|
1497 |
printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
|
1498 |
#endif
|
1499 |
return ret;
|
1500 |
} |
1501 |
|
1502 |
void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val) |
1503 |
{ |
1504 |
IDEBus *bus = opaque; |
1505 |
IDEState *s; |
1506 |
int i;
|
1507 |
|
1508 |
#ifdef DEBUG_IDE
|
1509 |
printf("ide: write control addr=0x%x val=%02x\n", addr, val);
|
1510 |
#endif
|
1511 |
/* common for both drives */
|
1512 |
if (!(bus->cmd & IDE_CMD_RESET) &&
|
1513 |
(val & IDE_CMD_RESET)) { |
1514 |
/* reset low to high */
|
1515 |
for(i = 0;i < 2; i++) { |
1516 |
s = &bus->ifs[i]; |
1517 |
s->status = BUSY_STAT | SEEK_STAT; |
1518 |
s->error = 0x01;
|
1519 |
} |
1520 |
} else if ((bus->cmd & IDE_CMD_RESET) && |
1521 |
!(val & IDE_CMD_RESET)) { |
1522 |
/* high to low */
|
1523 |
for(i = 0;i < 2; i++) { |
1524 |
s = &bus->ifs[i]; |
1525 |
if (s->drive_kind == IDE_CD)
|
1526 |
s->status = 0x00; /* NOTE: READY is _not_ set */ |
1527 |
else
|
1528 |
s->status = READY_STAT | SEEK_STAT; |
1529 |
ide_set_signature(s); |
1530 |
} |
1531 |
} |
1532 |
|
1533 |
bus->cmd = val; |
1534 |
} |
1535 |
|
1536 |
/*
|
1537 |
* Returns true if the running PIO transfer is a PIO out (i.e. data is
|
1538 |
* transferred from the device to the guest), false if it's a PIO in
|
1539 |
*/
|
1540 |
static bool ide_is_pio_out(IDEState *s) |
1541 |
{ |
1542 |
if (s->end_transfer_func == ide_sector_write ||
|
1543 |
s->end_transfer_func == ide_atapi_cmd) { |
1544 |
return false; |
1545 |
} else if (s->end_transfer_func == ide_sector_read || |
1546 |
s->end_transfer_func == ide_transfer_stop || |
1547 |
s->end_transfer_func == ide_atapi_cmd_reply_end || |
1548 |
s->end_transfer_func == ide_dummy_transfer_stop) { |
1549 |
return true; |
1550 |
} |
1551 |
|
1552 |
abort(); |
1553 |
} |
1554 |
|
1555 |
void ide_data_writew(void *opaque, uint32_t addr, uint32_t val) |
1556 |
{ |
1557 |
IDEBus *bus = opaque; |
1558 |
IDEState *s = idebus_active_if(bus); |
1559 |
uint8_t *p; |
1560 |
|
1561 |
/* PIO data access allowed only when DRQ bit is set. The result of a write
|
1562 |
* during PIO out is indeterminate, just ignore it. */
|
1563 |
if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
|
1564 |
return;
|
1565 |
} |
1566 |
|
1567 |
p = s->data_ptr; |
1568 |
*(uint16_t *)p = le16_to_cpu(val); |
1569 |
p += 2;
|
1570 |
s->data_ptr = p; |
1571 |
if (p >= s->data_end)
|
1572 |
s->end_transfer_func(s); |
1573 |
} |
1574 |
|
1575 |
uint32_t ide_data_readw(void *opaque, uint32_t addr)
|
1576 |
{ |
1577 |
IDEBus *bus = opaque; |
1578 |
IDEState *s = idebus_active_if(bus); |
1579 |
uint8_t *p; |
1580 |
int ret;
|
1581 |
|
1582 |
/* PIO data access allowed only when DRQ bit is set. The result of a read
|
1583 |
* during PIO in is indeterminate, return 0 and don't move forward. */
|
1584 |
if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
|
1585 |
return 0; |
1586 |
} |
1587 |
|
1588 |
p = s->data_ptr; |
1589 |
ret = cpu_to_le16(*(uint16_t *)p); |
1590 |
p += 2;
|
1591 |
s->data_ptr = p; |
1592 |
if (p >= s->data_end)
|
1593 |
s->end_transfer_func(s); |
1594 |
return ret;
|
1595 |
} |
1596 |
|
1597 |
void ide_data_writel(void *opaque, uint32_t addr, uint32_t val) |
1598 |
{ |
1599 |
IDEBus *bus = opaque; |
1600 |
IDEState *s = idebus_active_if(bus); |
1601 |
uint8_t *p; |
1602 |
|
1603 |
/* PIO data access allowed only when DRQ bit is set. The result of a write
|
1604 |
* during PIO out is indeterminate, just ignore it. */
|
1605 |
if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
|
1606 |
return;
|
1607 |
} |
1608 |
|
1609 |
p = s->data_ptr; |
1610 |
*(uint32_t *)p = le32_to_cpu(val); |
1611 |
p += 4;
|
1612 |
s->data_ptr = p; |
1613 |
if (p >= s->data_end)
|
1614 |
s->end_transfer_func(s); |
1615 |
} |
1616 |
|
1617 |
uint32_t ide_data_readl(void *opaque, uint32_t addr)
|
1618 |
{ |
1619 |
IDEBus *bus = opaque; |
1620 |
IDEState *s = idebus_active_if(bus); |
1621 |
uint8_t *p; |
1622 |
int ret;
|
1623 |
|
1624 |
/* PIO data access allowed only when DRQ bit is set. The result of a read
|
1625 |
* during PIO in is indeterminate, return 0 and don't move forward. */
|
1626 |
if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
|
1627 |
return 0; |
1628 |
} |
1629 |
|
1630 |
p = s->data_ptr; |
1631 |
ret = cpu_to_le32(*(uint32_t *)p); |
1632 |
p += 4;
|
1633 |
s->data_ptr = p; |
1634 |
if (p >= s->data_end)
|
1635 |
s->end_transfer_func(s); |
1636 |
return ret;
|
1637 |
} |
1638 |
|
1639 |
static void ide_dummy_transfer_stop(IDEState *s) |
1640 |
{ |
1641 |
s->data_ptr = s->io_buffer; |
1642 |
s->data_end = s->io_buffer; |
1643 |
s->io_buffer[0] = 0xff; |
1644 |
s->io_buffer[1] = 0xff; |
1645 |
s->io_buffer[2] = 0xff; |
1646 |
s->io_buffer[3] = 0xff; |
1647 |
} |
1648 |
|
1649 |
static void ide_reset(IDEState *s) |
1650 |
{ |
1651 |
#ifdef DEBUG_IDE
|
1652 |
printf("ide: reset\n");
|
1653 |
#endif
|
1654 |
if (s->drive_kind == IDE_CFATA)
|
1655 |
s->mult_sectors = 0;
|
1656 |
else
|
1657 |
s->mult_sectors = MAX_MULT_SECTORS; |
1658 |
/* ide regs */
|
1659 |
s->feature = 0;
|
1660 |
s->error = 0;
|
1661 |
s->nsector = 0;
|
1662 |
s->sector = 0;
|
1663 |
s->lcyl = 0;
|
1664 |
s->hcyl = 0;
|
1665 |
|
1666 |
/* lba48 */
|
1667 |
s->hob_feature = 0;
|
1668 |
s->hob_sector = 0;
|
1669 |
s->hob_nsector = 0;
|
1670 |
s->hob_lcyl = 0;
|
1671 |
s->hob_hcyl = 0;
|
1672 |
|
1673 |
s->select = 0xa0;
|
1674 |
s->status = READY_STAT | SEEK_STAT; |
1675 |
|
1676 |
s->lba48 = 0;
|
1677 |
|
1678 |
/* ATAPI specific */
|
1679 |
s->sense_key = 0;
|
1680 |
s->asc = 0;
|
1681 |
s->cdrom_changed = 0;
|
1682 |
s->packet_transfer_size = 0;
|
1683 |
s->elementary_transfer_size = 0;
|
1684 |
s->io_buffer_index = 0;
|
1685 |
s->cd_sector_size = 0;
|
1686 |
s->atapi_dma = 0;
|
1687 |
/* ATA DMA state */
|
1688 |
s->io_buffer_size = 0;
|
1689 |
s->req_nb_sectors = 0;
|
1690 |
|
1691 |
ide_set_signature(s); |
1692 |
/* init the transfer handler so that 0xffff is returned on data
|
1693 |
accesses */
|
1694 |
s->end_transfer_func = ide_dummy_transfer_stop; |
1695 |
ide_dummy_transfer_stop(s); |
1696 |
s->media_changed = 0;
|
1697 |
} |
1698 |
|
1699 |
void ide_bus_reset(IDEBus *bus)
|
1700 |
{ |
1701 |
bus->unit = 0;
|
1702 |
bus->cmd = 0;
|
1703 |
ide_reset(&bus->ifs[0]);
|
1704 |
ide_reset(&bus->ifs[1]);
|
1705 |
ide_clear_hob(bus); |
1706 |
|
1707 |
/* pending async DMA */
|
1708 |
if (bus->dma->aiocb) {
|
1709 |
#ifdef DEBUG_AIO
|
1710 |
printf("aio_cancel\n");
|
1711 |
#endif
|
1712 |
bdrv_aio_cancel(bus->dma->aiocb); |
1713 |
bus->dma->aiocb = NULL;
|
1714 |
} |
1715 |
|
1716 |
/* reset dma provider too */
|
1717 |
bus->dma->ops->reset(bus->dma); |
1718 |
} |
1719 |
|
1720 |
int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
|
1721 |
const char *version, const char *serial) |
1722 |
{ |
1723 |
int cylinders, heads, secs;
|
1724 |
uint64_t nb_sectors; |
1725 |
|
1726 |
s->bs = bs; |
1727 |
s->drive_kind = kind; |
1728 |
|
1729 |
bdrv_get_geometry(bs, &nb_sectors); |
1730 |
bdrv_guess_geometry(bs, &cylinders, &heads, &secs); |
1731 |
if (cylinders < 1 || cylinders > 16383) { |
1732 |
error_report("cyls must be between 1 and 16383");
|
1733 |
return -1; |
1734 |
} |
1735 |
if (heads < 1 || heads > 16) { |
1736 |
error_report("heads must be between 1 and 16");
|
1737 |
return -1; |
1738 |
} |
1739 |
if (secs < 1 || secs > 63) { |
1740 |
error_report("secs must be between 1 and 63");
|
1741 |
return -1; |
1742 |
} |
1743 |
s->cylinders = cylinders; |
1744 |
s->heads = heads; |
1745 |
s->sectors = secs; |
1746 |
s->nb_sectors = nb_sectors; |
1747 |
/* The SMART values should be preserved across power cycles
|
1748 |
but they aren't. */
|
1749 |
s->smart_enabled = 1;
|
1750 |
s->smart_autosave = 1;
|
1751 |
s->smart_errors = 0;
|
1752 |
s->smart_selftest_count = 0;
|
1753 |
if (kind == IDE_CD) {
|
1754 |
bdrv_set_change_cb(bs, cdrom_change_cb, s); |
1755 |
bs->buffer_alignment = 2048;
|
1756 |
} else {
|
1757 |
if (!bdrv_is_inserted(s->bs)) {
|
1758 |
error_report("Device needs media, but drive is empty");
|
1759 |
return -1; |
1760 |
} |
1761 |
if (bdrv_is_read_only(bs)) {
|
1762 |
error_report("Can't use a read-only drive");
|
1763 |
return -1; |
1764 |
} |
1765 |
} |
1766 |
if (serial) {
|
1767 |
strncpy(s->drive_serial_str, serial, sizeof(s->drive_serial_str));
|
1768 |
} else {
|
1769 |
snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
|
1770 |
"QM%05d", s->drive_serial);
|
1771 |
} |
1772 |
if (version) {
|
1773 |
pstrcpy(s->version, sizeof(s->version), version);
|
1774 |
} else {
|
1775 |
pstrcpy(s->version, sizeof(s->version), QEMU_VERSION);
|
1776 |
} |
1777 |
|
1778 |
ide_reset(s); |
1779 |
bdrv_set_removable(bs, s->drive_kind == IDE_CD); |
1780 |
return 0; |
1781 |
} |
1782 |
|
1783 |
static void ide_init1(IDEBus *bus, int unit) |
1784 |
{ |
1785 |
static int drive_serial = 1; |
1786 |
IDEState *s = &bus->ifs[unit]; |
1787 |
|
1788 |
s->bus = bus; |
1789 |
s->unit = unit; |
1790 |
s->drive_serial = drive_serial++; |
1791 |
/* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
|
1792 |
s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4; |
1793 |
s->io_buffer = qemu_memalign(2048, s->io_buffer_total_len);
|
1794 |
memset(s->io_buffer, 0, s->io_buffer_total_len);
|
1795 |
|
1796 |
s->smart_selftest_data = qemu_blockalign(s->bs, 512);
|
1797 |
memset(s->smart_selftest_data, 0, 512); |
1798 |
|
1799 |
s->sector_write_timer = qemu_new_timer_ns(vm_clock, |
1800 |
ide_sector_write_timer_cb, s); |
1801 |
} |
1802 |
|
1803 |
static void ide_nop_start(IDEDMA *dma, IDEState *s, |
1804 |
BlockDriverCompletionFunc *cb) |
1805 |
{ |
1806 |
} |
1807 |
|
1808 |
static int ide_nop(IDEDMA *dma) |
1809 |
{ |
1810 |
return 0; |
1811 |
} |
1812 |
|
1813 |
static int ide_nop_int(IDEDMA *dma, int x) |
1814 |
{ |
1815 |
return 0; |
1816 |
} |
1817 |
|
1818 |
static void ide_nop_restart(void *opaque, int x, int y) |
1819 |
{ |
1820 |
} |
1821 |
|
1822 |
static const IDEDMAOps ide_dma_nop_ops = { |
1823 |
.start_dma = ide_nop_start, |
1824 |
.start_transfer = ide_nop, |
1825 |
.prepare_buf = ide_nop_int, |
1826 |
.rw_buf = ide_nop_int, |
1827 |
.set_unit = ide_nop_int, |
1828 |
.add_status = ide_nop_int, |
1829 |
.set_inactive = ide_nop, |
1830 |
.restart_cb = ide_nop_restart, |
1831 |
.reset = ide_nop, |
1832 |
}; |
1833 |
|
1834 |
static IDEDMA ide_dma_nop = {
|
1835 |
.ops = &ide_dma_nop_ops, |
1836 |
.aiocb = NULL,
|
1837 |
}; |
1838 |
|
1839 |
void ide_init2(IDEBus *bus, qemu_irq irq)
|
1840 |
{ |
1841 |
int i;
|
1842 |
|
1843 |
for(i = 0; i < 2; i++) { |
1844 |
ide_init1(bus, i); |
1845 |
ide_reset(&bus->ifs[i]); |
1846 |
} |
1847 |
bus->irq = irq; |
1848 |
bus->dma = &ide_dma_nop; |
1849 |
} |
1850 |
|
1851 |
/* TODO convert users to qdev and remove */
|
1852 |
void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
|
1853 |
DriveInfo *hd1, qemu_irq irq) |
1854 |
{ |
1855 |
int i;
|
1856 |
DriveInfo *dinfo; |
1857 |
|
1858 |
for(i = 0; i < 2; i++) { |
1859 |
dinfo = i == 0 ? hd0 : hd1;
|
1860 |
ide_init1(bus, i); |
1861 |
if (dinfo) {
|
1862 |
if (ide_init_drive(&bus->ifs[i], dinfo->bdrv,
|
1863 |
dinfo->media_cd ? IDE_CD : IDE_HD, NULL,
|
1864 |
*dinfo->serial ? dinfo->serial : NULL) < 0) { |
1865 |
error_report("Can't set up IDE drive %s", dinfo->id);
|
1866 |
exit(1);
|
1867 |
} |
1868 |
} else {
|
1869 |
ide_reset(&bus->ifs[i]); |
1870 |
} |
1871 |
} |
1872 |
bus->irq = irq; |
1873 |
bus->dma = &ide_dma_nop; |
1874 |
} |
1875 |
|
1876 |
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2) |
1877 |
{ |
1878 |
register_ioport_write(iobase, 8, 1, ide_ioport_write, bus); |
1879 |
register_ioport_read(iobase, 8, 1, ide_ioport_read, bus); |
1880 |
if (iobase2) {
|
1881 |
register_ioport_read(iobase2, 1, 1, ide_status_read, bus); |
1882 |
register_ioport_write(iobase2, 1, 1, ide_cmd_write, bus); |
1883 |
} |
1884 |
|
1885 |
/* data ports */
|
1886 |
register_ioport_write(iobase, 2, 2, ide_data_writew, bus); |
1887 |
register_ioport_read(iobase, 2, 2, ide_data_readw, bus); |
1888 |
register_ioport_write(iobase, 4, 4, ide_data_writel, bus); |
1889 |
register_ioport_read(iobase, 4, 4, ide_data_readl, bus); |
1890 |
} |
1891 |
|
1892 |
static bool is_identify_set(void *opaque, int version_id) |
1893 |
{ |
1894 |
IDEState *s = opaque; |
1895 |
|
1896 |
return s->identify_set != 0; |
1897 |
} |
1898 |
|
1899 |
static EndTransferFunc* transfer_end_table[] = {
|
1900 |
ide_sector_read, |
1901 |
ide_sector_write, |
1902 |
ide_transfer_stop, |
1903 |
ide_atapi_cmd_reply_end, |
1904 |
ide_atapi_cmd, |
1905 |
ide_dummy_transfer_stop, |
1906 |
}; |
1907 |
|
1908 |
static int transfer_end_table_idx(EndTransferFunc *fn) |
1909 |
{ |
1910 |
int i;
|
1911 |
|
1912 |
for (i = 0; i < ARRAY_SIZE(transfer_end_table); i++) |
1913 |
if (transfer_end_table[i] == fn)
|
1914 |
return i;
|
1915 |
|
1916 |
return -1; |
1917 |
} |
1918 |
|
1919 |
static int ide_drive_post_load(void *opaque, int version_id) |
1920 |
{ |
1921 |
IDEState *s = opaque; |
1922 |
|
1923 |
if (version_id < 3) { |
1924 |
if (s->sense_key == SENSE_UNIT_ATTENTION &&
|
1925 |
s->asc == ASC_MEDIUM_MAY_HAVE_CHANGED) { |
1926 |
s->cdrom_changed = 1;
|
1927 |
} |
1928 |
} |
1929 |
return 0; |
1930 |
} |
1931 |
|
1932 |
static int ide_drive_pio_post_load(void *opaque, int version_id) |
1933 |
{ |
1934 |
IDEState *s = opaque; |
1935 |
|
1936 |
if (s->end_transfer_fn_idx > ARRAY_SIZE(transfer_end_table)) {
|
1937 |
return -EINVAL;
|
1938 |
} |
1939 |
s->end_transfer_func = transfer_end_table[s->end_transfer_fn_idx]; |
1940 |
s->data_ptr = s->io_buffer + s->cur_io_buffer_offset; |
1941 |
s->data_end = s->data_ptr + s->cur_io_buffer_len; |
1942 |
|
1943 |
return 0; |
1944 |
} |
1945 |
|
1946 |
static void ide_drive_pio_pre_save(void *opaque) |
1947 |
{ |
1948 |
IDEState *s = opaque; |
1949 |
int idx;
|
1950 |
|
1951 |
s->cur_io_buffer_offset = s->data_ptr - s->io_buffer; |
1952 |
s->cur_io_buffer_len = s->data_end - s->data_ptr; |
1953 |
|
1954 |
idx = transfer_end_table_idx(s->end_transfer_func); |
1955 |
if (idx == -1) { |
1956 |
fprintf(stderr, "%s: invalid end_transfer_func for DRQ_STAT\n",
|
1957 |
__func__); |
1958 |
s->end_transfer_fn_idx = 2;
|
1959 |
} else {
|
1960 |
s->end_transfer_fn_idx = idx; |
1961 |
} |
1962 |
} |
1963 |
|
1964 |
static bool ide_drive_pio_state_needed(void *opaque) |
1965 |
{ |
1966 |
IDEState *s = opaque; |
1967 |
|
1968 |
return ((s->status & DRQ_STAT) != 0) |
1969 |
|| (s->bus->error_status & BM_STATUS_PIO_RETRY); |
1970 |
} |
1971 |
|
1972 |
static bool ide_atapi_gesn_needed(void *opaque) |
1973 |
{ |
1974 |
IDEState *s = opaque; |
1975 |
|
1976 |
return s->events.new_media || s->events.eject_request;
|
1977 |
} |
1978 |
|
1979 |
static bool ide_error_needed(void *opaque) |
1980 |
{ |
1981 |
IDEBus *bus = opaque; |
1982 |
|
1983 |
return (bus->error_status != 0); |
1984 |
} |
1985 |
|
1986 |
/* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
|
1987 |
const VMStateDescription vmstate_ide_atapi_gesn_state = {
|
1988 |
.name ="ide_drive/atapi/gesn_state",
|
1989 |
.version_id = 1,
|
1990 |
.minimum_version_id = 1,
|
1991 |
.minimum_version_id_old = 1,
|
1992 |
.fields = (VMStateField []) { |
1993 |
VMSTATE_BOOL(events.new_media, IDEState), |
1994 |
VMSTATE_BOOL(events.eject_request, IDEState), |
1995 |
VMSTATE_END_OF_LIST() |
1996 |
} |
1997 |
}; |
1998 |
|
1999 |
const VMStateDescription vmstate_ide_drive_pio_state = {
|
2000 |
.name = "ide_drive/pio_state",
|
2001 |
.version_id = 1,
|
2002 |
.minimum_version_id = 1,
|
2003 |
.minimum_version_id_old = 1,
|
2004 |
.pre_save = ide_drive_pio_pre_save, |
2005 |
.post_load = ide_drive_pio_post_load, |
2006 |
.fields = (VMStateField []) { |
2007 |
VMSTATE_INT32(req_nb_sectors, IDEState), |
2008 |
VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1,
|
2009 |
vmstate_info_uint8, uint8_t), |
2010 |
VMSTATE_INT32(cur_io_buffer_offset, IDEState), |
2011 |
VMSTATE_INT32(cur_io_buffer_len, IDEState), |
2012 |
VMSTATE_UINT8(end_transfer_fn_idx, IDEState), |
2013 |
VMSTATE_INT32(elementary_transfer_size, IDEState), |
2014 |
VMSTATE_INT32(packet_transfer_size, IDEState), |
2015 |
VMSTATE_END_OF_LIST() |
2016 |
} |
2017 |
}; |
2018 |
|
2019 |
const VMStateDescription vmstate_ide_drive = {
|
2020 |
.name = "ide_drive",
|
2021 |
.version_id = 3,
|
2022 |
.minimum_version_id = 0,
|
2023 |
.minimum_version_id_old = 0,
|
2024 |
.post_load = ide_drive_post_load, |
2025 |
.fields = (VMStateField []) { |
2026 |
VMSTATE_INT32(mult_sectors, IDEState), |
2027 |
VMSTATE_INT32(identify_set, IDEState), |
2028 |
VMSTATE_BUFFER_TEST(identify_data, IDEState, is_identify_set), |
2029 |
VMSTATE_UINT8(feature, IDEState), |
2030 |
VMSTATE_UINT8(error, IDEState), |
2031 |
VMSTATE_UINT32(nsector, IDEState), |
2032 |
VMSTATE_UINT8(sector, IDEState), |
2033 |
VMSTATE_UINT8(lcyl, IDEState), |
2034 |
VMSTATE_UINT8(hcyl, IDEState), |
2035 |
VMSTATE_UINT8(hob_feature, IDEState), |
2036 |
VMSTATE_UINT8(hob_sector, IDEState), |
2037 |
VMSTATE_UINT8(hob_nsector, IDEState), |
2038 |
VMSTATE_UINT8(hob_lcyl, IDEState), |
2039 |
VMSTATE_UINT8(hob_hcyl, IDEState), |
2040 |
VMSTATE_UINT8(select, IDEState), |
2041 |
VMSTATE_UINT8(status, IDEState), |
2042 |
VMSTATE_UINT8(lba48, IDEState), |
2043 |
VMSTATE_UINT8(sense_key, IDEState), |
2044 |
VMSTATE_UINT8(asc, IDEState), |
2045 |
VMSTATE_UINT8_V(cdrom_changed, IDEState, 3),
|
2046 |
VMSTATE_END_OF_LIST() |
2047 |
}, |
2048 |
.subsections = (VMStateSubsection []) { |
2049 |
{ |
2050 |
.vmsd = &vmstate_ide_drive_pio_state, |
2051 |
.needed = ide_drive_pio_state_needed, |
2052 |
}, { |
2053 |
.vmsd = &vmstate_ide_atapi_gesn_state, |
2054 |
.needed = ide_atapi_gesn_needed, |
2055 |
}, { |
2056 |
/* empty */
|
2057 |
} |
2058 |
} |
2059 |
}; |
2060 |
|
2061 |
const VMStateDescription vmstate_ide_error_status = {
|
2062 |
.name ="ide_bus/error",
|
2063 |
.version_id = 1,
|
2064 |
.minimum_version_id = 1,
|
2065 |
.minimum_version_id_old = 1,
|
2066 |
.fields = (VMStateField []) { |
2067 |
VMSTATE_INT32(error_status, IDEBus), |
2068 |
VMSTATE_END_OF_LIST() |
2069 |
} |
2070 |
}; |
2071 |
|
2072 |
const VMStateDescription vmstate_ide_bus = {
|
2073 |
.name = "ide_bus",
|
2074 |
.version_id = 1,
|
2075 |
.minimum_version_id = 1,
|
2076 |
.minimum_version_id_old = 1,
|
2077 |
.fields = (VMStateField []) { |
2078 |
VMSTATE_UINT8(cmd, IDEBus), |
2079 |
VMSTATE_UINT8(unit, IDEBus), |
2080 |
VMSTATE_END_OF_LIST() |
2081 |
}, |
2082 |
.subsections = (VMStateSubsection []) { |
2083 |
{ |
2084 |
.vmsd = &vmstate_ide_error_status, |
2085 |
.needed = ide_error_needed, |
2086 |
}, { |
2087 |
/* empty */
|
2088 |
} |
2089 |
} |
2090 |
}; |
2091 |
|
2092 |
void ide_drive_get(DriveInfo **hd, int max_bus) |
2093 |
{ |
2094 |
int i;
|
2095 |
|
2096 |
if (drive_get_max_bus(IF_IDE) >= max_bus) {
|
2097 |
fprintf(stderr, "qemu: too many IDE bus: %d\n", max_bus);
|
2098 |
exit(1);
|
2099 |
} |
2100 |
|
2101 |
for(i = 0; i < max_bus * MAX_IDE_DEVS; i++) { |
2102 |
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
2103 |
} |
2104 |
} |