Revision c9297f4d target-mips/translate.c

b/target-mips/translate.c
6122 6122
    case FOP(18, 16):
6123 6123
        {
6124 6124
            int l1 = gen_new_label();
6125
            TCGv t0 = tcg_temp_new();
6126
            TCGv_i32 fp0 = tcg_temp_local_new_i32();
6125
            TCGv_i32 fp0;
6127 6126

  
6128
            gen_load_gpr(t0, ft);
6129
            tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
6127
            if (ft != 0) {
6128
                tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
6129
            }
6130
            fp0 = tcg_temp_new_i32();
6130 6131
            gen_load_fpr32(fp0, fs);
6131 6132
            gen_store_fpr32(fp0, fd);
6132 6133
            tcg_temp_free_i32(fp0);
6133 6134
            gen_set_label(l1);
6134
            tcg_temp_free(t0);
6135 6135
        }
6136 6136
        opn = "movz.s";
6137 6137
        break;
6138 6138
    case FOP(19, 16):
6139 6139
        {
6140 6140
            int l1 = gen_new_label();
6141
            TCGv t0 = tcg_temp_new();
6142
            TCGv_i32 fp0 = tcg_temp_local_new_i32();
6143

  
6144
            gen_load_gpr(t0, ft);
6145
            tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
6146
            gen_load_fpr32(fp0, fs);
6147
            gen_store_fpr32(fp0, fd);
6148
            tcg_temp_free_i32(fp0);
6149
            gen_set_label(l1);
6150
            tcg_temp_free(t0);
6141
            TCGv_i32 fp0;
6142

  
6143
            if (ft != 0) {
6144
                tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
6145
                fp0 = tcg_temp_new_i32();
6146
                gen_load_fpr32(fp0, fs);
6147
                gen_store_fpr32(fp0, fd);
6148
                tcg_temp_free_i32(fp0);
6149
                gen_set_label(l1);
6150
            }
6151 6151
        }
6152 6152
        opn = "movn.s";
6153 6153
        break;
......
6541 6541
    case FOP(18, 17):
6542 6542
        {
6543 6543
            int l1 = gen_new_label();
6544
            TCGv t0 = tcg_temp_new();
6545
            TCGv_i64 fp0 = tcg_temp_local_new_i64();
6544
            TCGv_i64 fp0;
6546 6545

  
6547
            gen_load_gpr(t0, ft);
6548
            tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
6546
            if (ft != 0) {
6547
                tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
6548
            }
6549
            fp0 = tcg_temp_new_i64();
6549 6550
            gen_load_fpr64(ctx, fp0, fs);
6550 6551
            gen_store_fpr64(ctx, fp0, fd);
6551 6552
            tcg_temp_free_i64(fp0);
6552 6553
            gen_set_label(l1);
6553
            tcg_temp_free(t0);
6554 6554
        }
6555 6555
        opn = "movz.d";
6556 6556
        break;
6557 6557
    case FOP(19, 17):
6558 6558
        {
6559 6559
            int l1 = gen_new_label();
6560
            TCGv t0 = tcg_temp_new();
6561
            TCGv_i64 fp0 = tcg_temp_local_new_i64();
6562

  
6563
            gen_load_gpr(t0, ft);
6564
            tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
6565
            gen_load_fpr64(ctx, fp0, fs);
6566
            gen_store_fpr64(ctx, fp0, fd);
6567
            tcg_temp_free_i64(fp0);
6568
            gen_set_label(l1);
6569
            tcg_temp_free(t0);
6560
            TCGv_i64 fp0;
6561

  
6562
            if (ft != 0) {
6563
                tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
6564
                fp0 = tcg_temp_new_i64();
6565
                gen_load_fpr64(ctx, fp0, fs);
6566
                gen_store_fpr64(ctx, fp0, fd);
6567
                tcg_temp_free_i64(fp0);
6568
                gen_set_label(l1);
6569
            }
6570 6570
        }
6571 6571
        opn = "movn.d";
6572 6572
        break;
......
6876 6876
        check_cp1_64bitmode(ctx);
6877 6877
        {
6878 6878
            int l1 = gen_new_label();
6879
            TCGv t0 = tcg_temp_new();
6880
            TCGv_i32 fp0 = tcg_temp_local_new_i32();
6881
            TCGv_i32 fph0 = tcg_temp_local_new_i32();
6879
            TCGv_i32 fp0;
6882 6880

  
6883
            gen_load_gpr(t0, ft);
6884
            tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
6885
            gen_load_fpr32(fp0, fs);
6886
            gen_load_fpr32h(fph0, fs);
6887
            gen_store_fpr32(fp0, fd);
6888
            gen_store_fpr32h(fph0, fd);
6889
            tcg_temp_free_i32(fp0);
6890
            tcg_temp_free_i32(fph0);
6881
            if (ft != 0)
6882
                tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
6883
            fp0 = tcg_temp_new_i64();
6884
            gen_load_fpr64(ctx, fp0, fs);
6885
            gen_store_fpr64(ctx, fp0, fd);
6886
            tcg_temp_free_i64(fp0);
6891 6887
            gen_set_label(l1);
6892
            tcg_temp_free(t0);
6893 6888
        }
6894 6889
        opn = "movz.ps";
6895 6890
        break;
......
6897 6892
        check_cp1_64bitmode(ctx);
6898 6893
        {
6899 6894
            int l1 = gen_new_label();
6900
            TCGv t0 = tcg_temp_new();
6901
            TCGv_i32 fp0 = tcg_temp_local_new_i32();
6902
            TCGv_i32 fph0 = tcg_temp_local_new_i32();
6903

  
6904
            gen_load_gpr(t0, ft);
6905
            tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
6906
            gen_load_fpr32(fp0, fs);
6907
            gen_load_fpr32h(fph0, fs);
6908
            gen_store_fpr32(fp0, fd);
6909
            gen_store_fpr32h(fph0, fd);
6910
            tcg_temp_free_i32(fp0);
6911
            tcg_temp_free_i32(fph0);
6912
            gen_set_label(l1);
6913
            tcg_temp_free(t0);
6895
            TCGv_i32 fp0;
6896

  
6897
            if (ft != 0) {
6898
                tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
6899
                fp0 = tcg_temp_new_i64();
6900
                gen_load_fpr64(ctx, fp0, fs);
6901
                gen_store_fpr64(ctx, fp0, fd);
6902
                tcg_temp_free_i64(fp0);
6903
                gen_set_label(l1);
6904
            }
6914 6905
        }
6915 6906
        opn = "movn.ps";
6916 6907
        break;

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