Revision cb2dbfc3 target-ppc/cpu.h

b/target-ppc/cpu.h
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    /* floating point status and control register */
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    uint32_t fpscr;
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    CPU_COMMON
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    /* Next instruction pointer */
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    target_ulong nip;
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    int access_type; /* when a memory exception occurs, the access
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                        type is stored here */
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    CPU_COMMON
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    /* MMU context - only relevant for full system emulation */
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#if !defined(CONFIG_USER_ONLY)
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#if defined(TARGET_PPC64)
......
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#endif
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    /* Those resources are used only during code translation */
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    /* Next instruction pointer */
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    target_ulong nip;
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    /* opcode handlers */
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    opc_handler_t *opcodes[0x40];
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