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/*
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* qemu user main
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include "qemu.h" |
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#define DEBUG_LOGFILE "/tmp/qemu.log" |
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#ifdef __APPLE__
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#include <crt_externs.h> |
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# define environ (*_NSGetEnviron())
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#endif
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static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
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const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
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|
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#if defined(__i386__) && !defined(CONFIG_STATIC)
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/* Force usage of an ELF interpreter even if it is an ELF shared
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object ! */
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const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
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#endif
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|
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/* for recent libc, we add these dummy symbols which are not declared
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when generating a linked object (bug in ld ?) */
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#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
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long __preinit_array_start[0]; |
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long __preinit_array_end[0]; |
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long __init_array_start[0]; |
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long __init_array_end[0]; |
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long __fini_array_start[0]; |
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long __fini_array_end[0]; |
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#endif
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|
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/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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we allocate a bigger stack. Need a better solution, for example
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by remapping the process stack directly at the right place */
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unsigned long x86_stack_size = 512 * 1024; |
60 |
|
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void gemu_log(const char *fmt, ...) |
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{ |
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va_list ap; |
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va_start(ap, fmt); |
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vfprintf(stderr, fmt, ap); |
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va_end(ap); |
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} |
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|
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void cpu_outb(CPUState *env, int addr, int val) |
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{ |
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fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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} |
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void cpu_outw(CPUState *env, int addr, int val) |
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{ |
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fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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} |
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|
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void cpu_outl(CPUState *env, int addr, int val) |
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{ |
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fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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} |
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int cpu_inb(CPUState *env, int addr) |
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{ |
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fprintf(stderr, "inb: port=0x%04x\n", addr);
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return 0; |
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} |
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int cpu_inw(CPUState *env, int addr) |
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{ |
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fprintf(stderr, "inw: port=0x%04x\n", addr);
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return 0; |
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} |
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|
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int cpu_inl(CPUState *env, int addr) |
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{ |
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fprintf(stderr, "inl: port=0x%04x\n", addr);
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return 0; |
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} |
102 |
|
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int cpu_get_pic_interrupt(CPUState *env)
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{ |
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return -1; |
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} |
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/* timers for rdtsc */
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|
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#if 0
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static uint64_t emu_time;
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int64_t cpu_get_real_ticks(void)
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{
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return emu_time++;
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}
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#endif
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#ifdef TARGET_I386
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/***********************************************************/
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/* CPUX86 core interface */
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void cpu_smm_update(CPUState *env)
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{ |
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} |
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{ |
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return cpu_get_real_ticks();
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} |
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static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
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int flags)
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{ |
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unsigned int e1, e2; |
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uint32_t *p; |
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e1 = (addr << 16) | (limit & 0xffff); |
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e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
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e2 |= flags; |
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p = ptr; |
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p[0] = tswapl(e1);
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p[1] = tswapl(e2);
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} |
146 |
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static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
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unsigned long addr, unsigned int sel) |
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{ |
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unsigned int e1, e2; |
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uint32_t *p; |
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e1 = (addr & 0xffff) | (sel << 16); |
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e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
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p = ptr; |
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p[0] = tswapl(e1);
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p[1] = tswapl(e2);
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} |
158 |
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uint64_t gdt_table[6];
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uint64_t idt_table[256];
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|
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/* only dpl matters as we do only user space emulation */
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static void set_idt(int n, unsigned int dpl) |
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{ |
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set_gate(idt_table + n, 0, dpl, 0, 0); |
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} |
167 |
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void cpu_loop(CPUX86State *env)
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{ |
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int trapnr;
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target_ulong pc; |
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target_siginfo_t info; |
173 |
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for(;;) {
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trapnr = cpu_x86_exec(env); |
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switch(trapnr) {
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case 0x80: |
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/* linux syscall */
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env->regs[R_EAX] = do_syscall(env, |
180 |
env->regs[R_EAX], |
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env->regs[R_EBX], |
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env->regs[R_ECX], |
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env->regs[R_EDX], |
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env->regs[R_ESI], |
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env->regs[R_EDI], |
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env->regs[R_EBP]); |
187 |
break;
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case EXCP0B_NOSEG:
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case EXCP0C_STACK:
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info.si_signo = SIGBUS; |
191 |
info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
195 |
break;
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case EXCP0D_GPF:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_fault(env); |
200 |
} else
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#endif
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{ |
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info.si_signo = SIGSEGV; |
204 |
info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
206 |
info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
208 |
} |
209 |
break;
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case EXCP0E_PAGE:
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info.si_signo = SIGSEGV; |
212 |
info.si_errno = 0;
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if (!(env->error_code & 1)) |
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info.si_code = TARGET_SEGV_MAPERR; |
215 |
else
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info.si_code = TARGET_SEGV_ACCERR; |
217 |
info._sifields._sigfault._addr = env->cr[2];
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queue_signal(info.si_signo, &info); |
219 |
break;
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case EXCP00_DIVZ:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
224 |
} else
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#endif
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{ |
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/* division by zero */
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info.si_signo = SIGFPE; |
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info.si_errno = 0;
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info.si_code = TARGET_FPE_INTDIV; |
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info._sifields._sigfault._addr = env->eip; |
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queue_signal(info.si_signo, &info); |
233 |
} |
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break;
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case EXCP01_SSTP:
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case EXCP03_INT3:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
240 |
} else
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#endif
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{ |
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info.si_signo = SIGTRAP; |
244 |
info.si_errno = 0;
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if (trapnr == EXCP01_SSTP) {
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info.si_code = TARGET_TRAP_BRKPT; |
247 |
info._sifields._sigfault._addr = env->eip; |
248 |
} else {
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info.si_code = TARGET_SI_KERNEL; |
250 |
info._sifields._sigfault._addr = 0;
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} |
252 |
queue_signal(info.si_signo, &info); |
253 |
} |
254 |
break;
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case EXCP04_INTO:
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case EXCP05_BOUND:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
260 |
} else
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#endif
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{ |
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info.si_signo = SIGSEGV; |
264 |
info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
268 |
} |
269 |
break;
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case EXCP06_ILLOP:
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info.si_signo = SIGILL; |
272 |
info.si_errno = 0;
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info.si_code = TARGET_ILL_ILLOPN; |
274 |
info._sifields._sigfault._addr = env->eip; |
275 |
queue_signal(info.si_signo, &info); |
276 |
break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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280 |
case EXCP_DEBUG:
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{ |
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int sig;
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283 |
|
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sig = gdb_handlesig (env, TARGET_SIGTRAP); |
285 |
if (sig)
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{ |
287 |
info.si_signo = sig; |
288 |
info.si_errno = 0;
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info.si_code = TARGET_TRAP_BRKPT; |
290 |
queue_signal(info.si_signo, &info); |
291 |
} |
292 |
} |
293 |
break;
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294 |
default:
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295 |
pc = env->segs[R_CS].base + env->eip; |
296 |
fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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(long)pc, trapnr);
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abort(); |
299 |
} |
300 |
process_pending_signals(env); |
301 |
} |
302 |
} |
303 |
#endif
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304 |
|
305 |
#ifdef TARGET_ARM
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306 |
|
307 |
/* XXX: find a better solution */
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308 |
extern void tb_invalidate_page_range(target_ulong start, target_ulong end); |
309 |
|
310 |
static void arm_cache_flush(target_ulong start, target_ulong last) |
311 |
{ |
312 |
target_ulong addr, last1; |
313 |
|
314 |
if (last < start)
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return;
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316 |
addr = start; |
317 |
for(;;) {
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318 |
last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
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319 |
if (last1 > last)
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320 |
last1 = last; |
321 |
tb_invalidate_page_range(addr, last1 + 1);
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322 |
if (last1 == last)
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323 |
break;
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324 |
addr = last1 + 1;
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325 |
} |
326 |
} |
327 |
|
328 |
void cpu_loop(CPUARMState *env)
|
329 |
{ |
330 |
int trapnr;
|
331 |
unsigned int n, insn; |
332 |
target_siginfo_t info; |
333 |
uint32_t addr; |
334 |
|
335 |
for(;;) {
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336 |
trapnr = cpu_arm_exec(env); |
337 |
switch(trapnr) {
|
338 |
case EXCP_UDEF:
|
339 |
{ |
340 |
TaskState *ts = env->opaque; |
341 |
uint32_t opcode; |
342 |
|
343 |
/* we handle the FPU emulation here, as Linux */
|
344 |
/* we get the opcode */
|
345 |
opcode = tget32(env->regs[15]);
|
346 |
|
347 |
if (EmulateAll(opcode, &ts->fpa, env) == 0) { |
348 |
info.si_signo = SIGILL; |
349 |
info.si_errno = 0;
|
350 |
info.si_code = TARGET_ILL_ILLOPN; |
351 |
info._sifields._sigfault._addr = env->regs[15];
|
352 |
queue_signal(info.si_signo, &info); |
353 |
} else {
|
354 |
/* increment PC */
|
355 |
env->regs[15] += 4; |
356 |
} |
357 |
} |
358 |
break;
|
359 |
case EXCP_SWI:
|
360 |
case EXCP_BKPT:
|
361 |
{ |
362 |
env->eabi = 1;
|
363 |
/* system call */
|
364 |
if (trapnr == EXCP_BKPT) {
|
365 |
if (env->thumb) {
|
366 |
insn = tget16(env->regs[15]);
|
367 |
n = insn & 0xff;
|
368 |
env->regs[15] += 2; |
369 |
} else {
|
370 |
insn = tget32(env->regs[15]);
|
371 |
n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
372 |
env->regs[15] += 4; |
373 |
} |
374 |
} else {
|
375 |
if (env->thumb) {
|
376 |
insn = tget16(env->regs[15] - 2); |
377 |
n = insn & 0xff;
|
378 |
} else {
|
379 |
insn = tget32(env->regs[15] - 4); |
380 |
n = insn & 0xffffff;
|
381 |
} |
382 |
} |
383 |
|
384 |
if (n == ARM_NR_cacheflush) {
|
385 |
arm_cache_flush(env->regs[0], env->regs[1]); |
386 |
} else if (n == ARM_NR_semihosting |
387 |
|| n == ARM_NR_thumb_semihosting) { |
388 |
env->regs[0] = do_arm_semihosting (env);
|
389 |
} else if (n == 0 || n >= ARM_SYSCALL_BASE |
390 |
|| (env->thumb && n == ARM_THUMB_SYSCALL)) { |
391 |
/* linux syscall */
|
392 |
if (env->thumb || n == 0) { |
393 |
n = env->regs[7];
|
394 |
} else {
|
395 |
n -= ARM_SYSCALL_BASE; |
396 |
env->eabi = 0;
|
397 |
} |
398 |
env->regs[0] = do_syscall(env,
|
399 |
n, |
400 |
env->regs[0],
|
401 |
env->regs[1],
|
402 |
env->regs[2],
|
403 |
env->regs[3],
|
404 |
env->regs[4],
|
405 |
env->regs[5]);
|
406 |
} else {
|
407 |
goto error;
|
408 |
} |
409 |
} |
410 |
break;
|
411 |
case EXCP_INTERRUPT:
|
412 |
/* just indicate that signals should be handled asap */
|
413 |
break;
|
414 |
case EXCP_PREFETCH_ABORT:
|
415 |
addr = env->cp15.c6_data; |
416 |
goto do_segv;
|
417 |
case EXCP_DATA_ABORT:
|
418 |
addr = env->cp15.c6_insn; |
419 |
goto do_segv;
|
420 |
do_segv:
|
421 |
{ |
422 |
info.si_signo = SIGSEGV; |
423 |
info.si_errno = 0;
|
424 |
/* XXX: check env->error_code */
|
425 |
info.si_code = TARGET_SEGV_MAPERR; |
426 |
info._sifields._sigfault._addr = addr; |
427 |
queue_signal(info.si_signo, &info); |
428 |
} |
429 |
break;
|
430 |
case EXCP_DEBUG:
|
431 |
{ |
432 |
int sig;
|
433 |
|
434 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
435 |
if (sig)
|
436 |
{ |
437 |
info.si_signo = sig; |
438 |
info.si_errno = 0;
|
439 |
info.si_code = TARGET_TRAP_BRKPT; |
440 |
queue_signal(info.si_signo, &info); |
441 |
} |
442 |
} |
443 |
break;
|
444 |
default:
|
445 |
error:
|
446 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
447 |
trapnr); |
448 |
cpu_dump_state(env, stderr, fprintf, 0);
|
449 |
abort(); |
450 |
} |
451 |
process_pending_signals(env); |
452 |
} |
453 |
} |
454 |
|
455 |
#endif
|
456 |
|
457 |
#ifdef TARGET_SPARC
|
458 |
|
459 |
//#define DEBUG_WIN
|
460 |
|
461 |
/* WARNING: dealing with register windows _is_ complicated. More info
|
462 |
can be found at http://www.sics.se/~psm/sparcstack.html */
|
463 |
static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
464 |
{ |
465 |
index = (index + cwp * 16) & (16 * NWINDOWS - 1); |
466 |
/* wrap handling : if cwp is on the last window, then we use the
|
467 |
registers 'after' the end */
|
468 |
if (index < 8 && env->cwp == (NWINDOWS - 1)) |
469 |
index += (16 * NWINDOWS);
|
470 |
return index;
|
471 |
} |
472 |
|
473 |
/* save the register window 'cwp1' */
|
474 |
static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
475 |
{ |
476 |
unsigned int i; |
477 |
target_ulong sp_ptr; |
478 |
|
479 |
sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
480 |
#if defined(DEBUG_WIN)
|
481 |
printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
|
482 |
(int)sp_ptr, cwp1);
|
483 |
#endif
|
484 |
for(i = 0; i < 16; i++) { |
485 |
tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
|
486 |
sp_ptr += sizeof(target_ulong);
|
487 |
} |
488 |
} |
489 |
|
490 |
static void save_window(CPUSPARCState *env) |
491 |
{ |
492 |
#ifndef TARGET_SPARC64
|
493 |
unsigned int new_wim; |
494 |
new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & |
495 |
((1LL << NWINDOWS) - 1); |
496 |
save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
497 |
env->wim = new_wim; |
498 |
#else
|
499 |
save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
500 |
env->cansave++; |
501 |
env->canrestore--; |
502 |
#endif
|
503 |
} |
504 |
|
505 |
static void restore_window(CPUSPARCState *env) |
506 |
{ |
507 |
unsigned int new_wim, i, cwp1; |
508 |
target_ulong sp_ptr; |
509 |
|
510 |
new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
511 |
((1LL << NWINDOWS) - 1); |
512 |
|
513 |
/* restore the invalid window */
|
514 |
cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
515 |
sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
516 |
#if defined(DEBUG_WIN)
|
517 |
printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
|
518 |
(int)sp_ptr, cwp1);
|
519 |
#endif
|
520 |
for(i = 0; i < 16; i++) { |
521 |
env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
|
522 |
sp_ptr += sizeof(target_ulong);
|
523 |
} |
524 |
env->wim = new_wim; |
525 |
#ifdef TARGET_SPARC64
|
526 |
env->canrestore++; |
527 |
if (env->cleanwin < NWINDOWS - 1) |
528 |
env->cleanwin++; |
529 |
env->cansave--; |
530 |
#endif
|
531 |
} |
532 |
|
533 |
static void flush_windows(CPUSPARCState *env) |
534 |
{ |
535 |
int offset, cwp1;
|
536 |
|
537 |
offset = 1;
|
538 |
for(;;) {
|
539 |
/* if restore would invoke restore_window(), then we can stop */
|
540 |
cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
|
541 |
if (env->wim & (1 << cwp1)) |
542 |
break;
|
543 |
save_window_offset(env, cwp1); |
544 |
offset++; |
545 |
} |
546 |
/* set wim so that restore will reload the registers */
|
547 |
cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
548 |
env->wim = 1 << cwp1;
|
549 |
#if defined(DEBUG_WIN)
|
550 |
printf("flush_windows: nb=%d\n", offset - 1); |
551 |
#endif
|
552 |
} |
553 |
|
554 |
void cpu_loop (CPUSPARCState *env)
|
555 |
{ |
556 |
int trapnr, ret;
|
557 |
target_siginfo_t info; |
558 |
|
559 |
while (1) { |
560 |
trapnr = cpu_sparc_exec (env); |
561 |
|
562 |
switch (trapnr) {
|
563 |
#ifndef TARGET_SPARC64
|
564 |
case 0x88: |
565 |
case 0x90: |
566 |
#else
|
567 |
case 0x110: |
568 |
case 0x16d: |
569 |
#endif
|
570 |
ret = do_syscall (env, env->gregs[1],
|
571 |
env->regwptr[0], env->regwptr[1], |
572 |
env->regwptr[2], env->regwptr[3], |
573 |
env->regwptr[4], env->regwptr[5]); |
574 |
if ((unsigned int)ret >= (unsigned int)(-515)) { |
575 |
#ifdef TARGET_SPARC64
|
576 |
env->xcc |= PSR_CARRY; |
577 |
#else
|
578 |
env->psr |= PSR_CARRY; |
579 |
#endif
|
580 |
ret = -ret; |
581 |
} else {
|
582 |
#ifdef TARGET_SPARC64
|
583 |
env->xcc &= ~PSR_CARRY; |
584 |
#else
|
585 |
env->psr &= ~PSR_CARRY; |
586 |
#endif
|
587 |
} |
588 |
env->regwptr[0] = ret;
|
589 |
/* next instruction */
|
590 |
env->pc = env->npc; |
591 |
env->npc = env->npc + 4;
|
592 |
break;
|
593 |
case 0x83: /* flush windows */ |
594 |
flush_windows(env); |
595 |
/* next instruction */
|
596 |
env->pc = env->npc; |
597 |
env->npc = env->npc + 4;
|
598 |
break;
|
599 |
#ifndef TARGET_SPARC64
|
600 |
case TT_WIN_OVF: /* window overflow */ |
601 |
save_window(env); |
602 |
break;
|
603 |
case TT_WIN_UNF: /* window underflow */ |
604 |
restore_window(env); |
605 |
break;
|
606 |
case TT_TFAULT:
|
607 |
case TT_DFAULT:
|
608 |
{ |
609 |
info.si_signo = SIGSEGV; |
610 |
info.si_errno = 0;
|
611 |
/* XXX: check env->error_code */
|
612 |
info.si_code = TARGET_SEGV_MAPERR; |
613 |
info._sifields._sigfault._addr = env->mmuregs[4];
|
614 |
queue_signal(info.si_signo, &info); |
615 |
} |
616 |
break;
|
617 |
#else
|
618 |
case TT_SPILL: /* window overflow */ |
619 |
save_window(env); |
620 |
break;
|
621 |
case TT_FILL: /* window underflow */ |
622 |
restore_window(env); |
623 |
break;
|
624 |
case TT_TFAULT:
|
625 |
case TT_DFAULT:
|
626 |
{ |
627 |
info.si_signo = SIGSEGV; |
628 |
info.si_errno = 0;
|
629 |
/* XXX: check env->error_code */
|
630 |
info.si_code = TARGET_SEGV_MAPERR; |
631 |
if (trapnr == TT_DFAULT)
|
632 |
info._sifields._sigfault._addr = env->dmmuregs[4];
|
633 |
else
|
634 |
info._sifields._sigfault._addr = env->tpc[env->tl]; |
635 |
queue_signal(info.si_signo, &info); |
636 |
} |
637 |
break;
|
638 |
case 0x16e: |
639 |
flush_windows(env); |
640 |
sparc64_get_context(env); |
641 |
break;
|
642 |
case 0x16f: |
643 |
flush_windows(env); |
644 |
sparc64_set_context(env); |
645 |
break;
|
646 |
#endif
|
647 |
case EXCP_INTERRUPT:
|
648 |
/* just indicate that signals should be handled asap */
|
649 |
break;
|
650 |
case EXCP_DEBUG:
|
651 |
{ |
652 |
int sig;
|
653 |
|
654 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
655 |
if (sig)
|
656 |
{ |
657 |
info.si_signo = sig; |
658 |
info.si_errno = 0;
|
659 |
info.si_code = TARGET_TRAP_BRKPT; |
660 |
queue_signal(info.si_signo, &info); |
661 |
} |
662 |
} |
663 |
break;
|
664 |
default:
|
665 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
666 |
cpu_dump_state(env, stderr, fprintf, 0);
|
667 |
exit (1);
|
668 |
} |
669 |
process_pending_signals (env); |
670 |
} |
671 |
} |
672 |
|
673 |
#endif
|
674 |
|
675 |
#ifdef TARGET_PPC
|
676 |
static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
677 |
{ |
678 |
/* TO FIX */
|
679 |
return 0; |
680 |
} |
681 |
|
682 |
uint32_t cpu_ppc_load_tbl (CPUState *env) |
683 |
{ |
684 |
return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
685 |
} |
686 |
|
687 |
uint32_t cpu_ppc_load_tbu (CPUState *env) |
688 |
{ |
689 |
return cpu_ppc_get_tb(env) >> 32; |
690 |
} |
691 |
|
692 |
uint32_t cpu_ppc_load_atbl (CPUState *env) |
693 |
{ |
694 |
return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
695 |
} |
696 |
|
697 |
uint32_t cpu_ppc_load_atbu (CPUState *env) |
698 |
{ |
699 |
return cpu_ppc_get_tb(env) >> 32; |
700 |
} |
701 |
|
702 |
uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
703 |
__attribute__ (( alias ("cpu_ppc_load_tbu") ));
|
704 |
|
705 |
uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
706 |
{ |
707 |
return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
708 |
} |
709 |
|
710 |
/* XXX: to be fixed */
|
711 |
int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) |
712 |
{ |
713 |
return -1; |
714 |
} |
715 |
|
716 |
int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) |
717 |
{ |
718 |
return -1; |
719 |
} |
720 |
|
721 |
#define EXCP_DUMP(env, fmt, args...) \
|
722 |
do { \
|
723 |
fprintf(stderr, fmt , ##args); \ |
724 |
cpu_dump_state(env, stderr, fprintf, 0); \
|
725 |
if (loglevel != 0) { \ |
726 |
fprintf(logfile, fmt , ##args); \ |
727 |
cpu_dump_state(env, logfile, fprintf, 0); \
|
728 |
} \ |
729 |
} while (0) |
730 |
|
731 |
void cpu_loop(CPUPPCState *env)
|
732 |
{ |
733 |
target_siginfo_t info; |
734 |
int trapnr;
|
735 |
uint32_t ret; |
736 |
|
737 |
for(;;) {
|
738 |
trapnr = cpu_ppc_exec(env); |
739 |
switch(trapnr) {
|
740 |
case POWERPC_EXCP_NONE:
|
741 |
/* Just go on */
|
742 |
break;
|
743 |
case POWERPC_EXCP_CRITICAL: /* Critical input */ |
744 |
cpu_abort(env, "Critical interrupt while in user mode. "
|
745 |
"Aborting\n");
|
746 |
break;
|
747 |
case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
748 |
cpu_abort(env, "Machine check exception while in user mode. "
|
749 |
"Aborting\n");
|
750 |
break;
|
751 |
case POWERPC_EXCP_DSI: /* Data storage exception */ |
752 |
EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", |
753 |
env->spr[SPR_DAR]); |
754 |
/* XXX: check this. Seems bugged */
|
755 |
switch (env->error_code & 0xFF000000) { |
756 |
case 0x40000000: |
757 |
info.si_signo = TARGET_SIGSEGV; |
758 |
info.si_errno = 0;
|
759 |
info.si_code = TARGET_SEGV_MAPERR; |
760 |
break;
|
761 |
case 0x04000000: |
762 |
info.si_signo = TARGET_SIGILL; |
763 |
info.si_errno = 0;
|
764 |
info.si_code = TARGET_ILL_ILLADR; |
765 |
break;
|
766 |
case 0x08000000: |
767 |
info.si_signo = TARGET_SIGSEGV; |
768 |
info.si_errno = 0;
|
769 |
info.si_code = TARGET_SEGV_ACCERR; |
770 |
break;
|
771 |
default:
|
772 |
/* Let's send a regular segfault... */
|
773 |
EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
774 |
env->error_code); |
775 |
info.si_signo = TARGET_SIGSEGV; |
776 |
info.si_errno = 0;
|
777 |
info.si_code = TARGET_SEGV_MAPERR; |
778 |
break;
|
779 |
} |
780 |
info._sifields._sigfault._addr = env->nip; |
781 |
queue_signal(info.si_signo, &info); |
782 |
break;
|
783 |
case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
784 |
EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", |
785 |
env->spr[SPR_DAR]); |
786 |
/* XXX: check this */
|
787 |
switch (env->error_code & 0xFF000000) { |
788 |
case 0x40000000: |
789 |
info.si_signo = TARGET_SIGSEGV; |
790 |
info.si_errno = 0;
|
791 |
info.si_code = TARGET_SEGV_MAPERR; |
792 |
break;
|
793 |
case 0x10000000: |
794 |
case 0x08000000: |
795 |
info.si_signo = TARGET_SIGSEGV; |
796 |
info.si_errno = 0;
|
797 |
info.si_code = TARGET_SEGV_ACCERR; |
798 |
break;
|
799 |
default:
|
800 |
/* Let's send a regular segfault... */
|
801 |
EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
802 |
env->error_code); |
803 |
info.si_signo = TARGET_SIGSEGV; |
804 |
info.si_errno = 0;
|
805 |
info.si_code = TARGET_SEGV_MAPERR; |
806 |
break;
|
807 |
} |
808 |
info._sifields._sigfault._addr = env->nip - 4;
|
809 |
queue_signal(info.si_signo, &info); |
810 |
break;
|
811 |
case POWERPC_EXCP_EXTERNAL: /* External input */ |
812 |
cpu_abort(env, "External interrupt while in user mode. "
|
813 |
"Aborting\n");
|
814 |
break;
|
815 |
case POWERPC_EXCP_ALIGN: /* Alignment exception */ |
816 |
EXCP_DUMP(env, "Unaligned memory access\n");
|
817 |
/* XXX: check this */
|
818 |
info.si_signo = TARGET_SIGBUS; |
819 |
info.si_errno = 0;
|
820 |
info.si_code = TARGET_BUS_ADRALN; |
821 |
info._sifields._sigfault._addr = env->nip - 4;
|
822 |
queue_signal(info.si_signo, &info); |
823 |
break;
|
824 |
case POWERPC_EXCP_PROGRAM: /* Program exception */ |
825 |
/* XXX: check this */
|
826 |
switch (env->error_code & ~0xF) { |
827 |
case POWERPC_EXCP_FP:
|
828 |
EXCP_DUMP(env, "Floating point program exception\n");
|
829 |
/* Set FX */
|
830 |
env->fpscr[7] |= 0x8; |
831 |
/* Finally, update FEX */
|
832 |
if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) & |
833 |
((env->fpscr[1] << 1) | (env->fpscr[0] >> 3))) |
834 |
env->fpscr[7] |= 0x4; |
835 |
info.si_signo = TARGET_SIGFPE; |
836 |
info.si_errno = 0;
|
837 |
switch (env->error_code & 0xF) { |
838 |
case POWERPC_EXCP_FP_OX:
|
839 |
info.si_code = TARGET_FPE_FLTOVF; |
840 |
break;
|
841 |
case POWERPC_EXCP_FP_UX:
|
842 |
info.si_code = TARGET_FPE_FLTUND; |
843 |
break;
|
844 |
case POWERPC_EXCP_FP_ZX:
|
845 |
case POWERPC_EXCP_FP_VXZDZ:
|
846 |
info.si_code = TARGET_FPE_FLTDIV; |
847 |
break;
|
848 |
case POWERPC_EXCP_FP_XX:
|
849 |
info.si_code = TARGET_FPE_FLTRES; |
850 |
break;
|
851 |
case POWERPC_EXCP_FP_VXSOFT:
|
852 |
info.si_code = TARGET_FPE_FLTINV; |
853 |
break;
|
854 |
case POWERPC_EXCP_FP_VXNAN:
|
855 |
case POWERPC_EXCP_FP_VXISI:
|
856 |
case POWERPC_EXCP_FP_VXIDI:
|
857 |
case POWERPC_EXCP_FP_VXIMZ:
|
858 |
case POWERPC_EXCP_FP_VXVC:
|
859 |
case POWERPC_EXCP_FP_VXSQRT:
|
860 |
case POWERPC_EXCP_FP_VXCVI:
|
861 |
info.si_code = TARGET_FPE_FLTSUB; |
862 |
break;
|
863 |
default:
|
864 |
EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
|
865 |
env->error_code); |
866 |
break;
|
867 |
} |
868 |
break;
|
869 |
case POWERPC_EXCP_INVAL:
|
870 |
EXCP_DUMP(env, "Invalid instruction\n");
|
871 |
info.si_signo = TARGET_SIGILL; |
872 |
info.si_errno = 0;
|
873 |
switch (env->error_code & 0xF) { |
874 |
case POWERPC_EXCP_INVAL_INVAL:
|
875 |
info.si_code = TARGET_ILL_ILLOPC; |
876 |
break;
|
877 |
case POWERPC_EXCP_INVAL_LSWX:
|
878 |
info.si_code = TARGET_ILL_ILLOPN; |
879 |
break;
|
880 |
case POWERPC_EXCP_INVAL_SPR:
|
881 |
info.si_code = TARGET_ILL_PRVREG; |
882 |
break;
|
883 |
case POWERPC_EXCP_INVAL_FP:
|
884 |
info.si_code = TARGET_ILL_COPROC; |
885 |
break;
|
886 |
default:
|
887 |
EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
|
888 |
env->error_code & 0xF);
|
889 |
info.si_code = TARGET_ILL_ILLADR; |
890 |
break;
|
891 |
} |
892 |
break;
|
893 |
case POWERPC_EXCP_PRIV:
|
894 |
EXCP_DUMP(env, "Privilege violation\n");
|
895 |
info.si_signo = TARGET_SIGILL; |
896 |
info.si_errno = 0;
|
897 |
switch (env->error_code & 0xF) { |
898 |
case POWERPC_EXCP_PRIV_OPC:
|
899 |
info.si_code = TARGET_ILL_PRVOPC; |
900 |
break;
|
901 |
case POWERPC_EXCP_PRIV_REG:
|
902 |
info.si_code = TARGET_ILL_PRVREG; |
903 |
break;
|
904 |
default:
|
905 |
EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
|
906 |
env->error_code & 0xF);
|
907 |
info.si_code = TARGET_ILL_PRVOPC; |
908 |
break;
|
909 |
} |
910 |
break;
|
911 |
case POWERPC_EXCP_TRAP:
|
912 |
cpu_abort(env, "Tried to call a TRAP\n");
|
913 |
break;
|
914 |
default:
|
915 |
/* Should not happen ! */
|
916 |
cpu_abort(env, "Unknown program exception (%02x)\n",
|
917 |
env->error_code); |
918 |
break;
|
919 |
} |
920 |
info._sifields._sigfault._addr = env->nip - 4;
|
921 |
queue_signal(info.si_signo, &info); |
922 |
break;
|
923 |
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
924 |
EXCP_DUMP(env, "No floating point allowed\n");
|
925 |
info.si_signo = TARGET_SIGILL; |
926 |
info.si_errno = 0;
|
927 |
info.si_code = TARGET_ILL_COPROC; |
928 |
info._sifields._sigfault._addr = env->nip - 4;
|
929 |
queue_signal(info.si_signo, &info); |
930 |
break;
|
931 |
case POWERPC_EXCP_SYSCALL: /* System call exception */ |
932 |
cpu_abort(env, "Syscall exception while in user mode. "
|
933 |
"Aborting\n");
|
934 |
break;
|
935 |
case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
936 |
EXCP_DUMP(env, "No APU instruction allowed\n");
|
937 |
info.si_signo = TARGET_SIGILL; |
938 |
info.si_errno = 0;
|
939 |
info.si_code = TARGET_ILL_COPROC; |
940 |
info._sifields._sigfault._addr = env->nip - 4;
|
941 |
queue_signal(info.si_signo, &info); |
942 |
break;
|
943 |
case POWERPC_EXCP_DECR: /* Decrementer exception */ |
944 |
cpu_abort(env, "Decrementer interrupt while in user mode. "
|
945 |
"Aborting\n");
|
946 |
break;
|
947 |
case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
948 |
cpu_abort(env, "Fix interval timer interrupt while in user mode. "
|
949 |
"Aborting\n");
|
950 |
break;
|
951 |
case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ |
952 |
cpu_abort(env, "Watchdog timer interrupt while in user mode. "
|
953 |
"Aborting\n");
|
954 |
break;
|
955 |
case POWERPC_EXCP_DTLB: /* Data TLB error */ |
956 |
cpu_abort(env, "Data TLB exception while in user mode. "
|
957 |
"Aborting\n");
|
958 |
break;
|
959 |
case POWERPC_EXCP_ITLB: /* Instruction TLB error */ |
960 |
cpu_abort(env, "Instruction TLB exception while in user mode. "
|
961 |
"Aborting\n");
|
962 |
break;
|
963 |
case POWERPC_EXCP_DEBUG: /* Debug interrupt */ |
964 |
/* XXX: check this */
|
965 |
{ |
966 |
int sig;
|
967 |
|
968 |
sig = gdb_handlesig(env, TARGET_SIGTRAP); |
969 |
if (sig) {
|
970 |
info.si_signo = sig; |
971 |
info.si_errno = 0;
|
972 |
info.si_code = TARGET_TRAP_BRKPT; |
973 |
queue_signal(info.si_signo, &info); |
974 |
} |
975 |
} |
976 |
break;
|
977 |
#if defined(TARGET_PPCEMB)
|
978 |
case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ |
979 |
EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
|
980 |
info.si_signo = TARGET_SIGILL; |
981 |
info.si_errno = 0;
|
982 |
info.si_code = TARGET_ILL_COPROC; |
983 |
info._sifields._sigfault._addr = env->nip - 4;
|
984 |
queue_signal(info.si_signo, &info); |
985 |
break;
|
986 |
case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ |
987 |
cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
|
988 |
break;
|
989 |
case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ |
990 |
cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
|
991 |
break;
|
992 |
case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ |
993 |
cpu_abort(env, "Performance monitor exception not handled\n");
|
994 |
break;
|
995 |
case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ |
996 |
cpu_abort(env, "Doorbell interrupt while in user mode. "
|
997 |
"Aborting\n");
|
998 |
break;
|
999 |
case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ |
1000 |
cpu_abort(env, "Doorbell critical interrupt while in user mode. "
|
1001 |
"Aborting\n");
|
1002 |
break;
|
1003 |
case POWERPC_EXCP_RESET: /* System reset exception */ |
1004 |
cpu_abort(env, "Reset interrupt while in user mode. "
|
1005 |
"Aborting\n");
|
1006 |
break;
|
1007 |
#endif /* defined(TARGET_PPCEMB) */ |
1008 |
#if defined(TARGET_PPC64) /* PowerPC 64 */ |
1009 |
case POWERPC_EXCP_DSEG: /* Data segment exception */ |
1010 |
cpu_abort(env, "Data segment exception while in user mode. "
|
1011 |
"Aborting\n");
|
1012 |
break;
|
1013 |
case POWERPC_EXCP_ISEG: /* Instruction segment exception */ |
1014 |
cpu_abort(env, "Instruction segment exception "
|
1015 |
"while in user mode. Aborting\n");
|
1016 |
break;
|
1017 |
#endif /* defined(TARGET_PPC64) */ |
1018 |
#if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ |
1019 |
case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
1020 |
cpu_abort(env, "Hypervisor decrementer interrupt "
|
1021 |
"while in user mode. Aborting\n");
|
1022 |
break;
|
1023 |
#endif /* defined(TARGET_PPC64H) */ |
1024 |
case POWERPC_EXCP_TRACE: /* Trace exception */ |
1025 |
/* Nothing to do:
|
1026 |
* we use this exception to emulate step-by-step execution mode.
|
1027 |
*/
|
1028 |
break;
|
1029 |
#if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ |
1030 |
case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
1031 |
cpu_abort(env, "Hypervisor data storage exception "
|
1032 |
"while in user mode. Aborting\n");
|
1033 |
break;
|
1034 |
case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ |
1035 |
cpu_abort(env, "Hypervisor instruction storage exception "
|
1036 |
"while in user mode. Aborting\n");
|
1037 |
break;
|
1038 |
case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ |
1039 |
cpu_abort(env, "Hypervisor data segment exception "
|
1040 |
"while in user mode. Aborting\n");
|
1041 |
break;
|
1042 |
case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ |
1043 |
cpu_abort(env, "Hypervisor instruction segment exception "
|
1044 |
"while in user mode. Aborting\n");
|
1045 |
break;
|
1046 |
#endif /* defined(TARGET_PPC64H) */ |
1047 |
case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
1048 |
EXCP_DUMP(env, "No Altivec instructions allowed\n");
|
1049 |
info.si_signo = TARGET_SIGILL; |
1050 |
info.si_errno = 0;
|
1051 |
info.si_code = TARGET_ILL_COPROC; |
1052 |
info._sifields._sigfault._addr = env->nip - 4;
|
1053 |
queue_signal(info.si_signo, &info); |
1054 |
break;
|
1055 |
case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ |
1056 |
cpu_abort(env, "Programable interval timer interrupt "
|
1057 |
"while in user mode. Aborting\n");
|
1058 |
break;
|
1059 |
case POWERPC_EXCP_IO: /* IO error exception */ |
1060 |
cpu_abort(env, "IO error exception while in user mode. "
|
1061 |
"Aborting\n");
|
1062 |
break;
|
1063 |
case POWERPC_EXCP_RUNM: /* Run mode exception */ |
1064 |
cpu_abort(env, "Run mode exception while in user mode. "
|
1065 |
"Aborting\n");
|
1066 |
break;
|
1067 |
case POWERPC_EXCP_EMUL: /* Emulation trap exception */ |
1068 |
cpu_abort(env, "Emulation trap exception not handled\n");
|
1069 |
break;
|
1070 |
case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ |
1071 |
cpu_abort(env, "Instruction fetch TLB exception "
|
1072 |
"while in user-mode. Aborting");
|
1073 |
break;
|
1074 |
case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ |
1075 |
cpu_abort(env, "Data load TLB exception while in user-mode. "
|
1076 |
"Aborting");
|
1077 |
break;
|
1078 |
case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ |
1079 |
cpu_abort(env, "Data store TLB exception while in user-mode. "
|
1080 |
"Aborting");
|
1081 |
break;
|
1082 |
case POWERPC_EXCP_FPA: /* Floating-point assist exception */ |
1083 |
cpu_abort(env, "Floating-point assist exception not handled\n");
|
1084 |
break;
|
1085 |
case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ |
1086 |
cpu_abort(env, "Instruction address breakpoint exception "
|
1087 |
"not handled\n");
|
1088 |
break;
|
1089 |
case POWERPC_EXCP_SMI: /* System management interrupt */ |
1090 |
cpu_abort(env, "System management interrupt while in user mode. "
|
1091 |
"Aborting\n");
|
1092 |
break;
|
1093 |
case POWERPC_EXCP_THERM: /* Thermal interrupt */ |
1094 |
cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
|
1095 |
"Aborting\n");
|
1096 |
break;
|
1097 |
case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ |
1098 |
cpu_abort(env, "Performance monitor exception not handled\n");
|
1099 |
break;
|
1100 |
case POWERPC_EXCP_VPUA: /* Vector assist exception */ |
1101 |
cpu_abort(env, "Vector assist exception not handled\n");
|
1102 |
break;
|
1103 |
case POWERPC_EXCP_SOFTP: /* Soft patch exception */ |
1104 |
cpu_abort(env, "Soft patch exception not handled\n");
|
1105 |
break;
|
1106 |
case POWERPC_EXCP_MAINT: /* Maintenance exception */ |
1107 |
cpu_abort(env, "Maintenance exception while in user mode. "
|
1108 |
"Aborting\n");
|
1109 |
break;
|
1110 |
case POWERPC_EXCP_STOP: /* stop translation */ |
1111 |
/* We did invalidate the instruction cache. Go on */
|
1112 |
break;
|
1113 |
case POWERPC_EXCP_BRANCH: /* branch instruction: */ |
1114 |
/* We just stopped because of a branch. Go on */
|
1115 |
break;
|
1116 |
case POWERPC_EXCP_SYSCALL_USER:
|
1117 |
/* system call in user-mode emulation */
|
1118 |
/* WARNING:
|
1119 |
* PPC ABI uses overflow flag in cr0 to signal an error
|
1120 |
* in syscalls.
|
1121 |
*/
|
1122 |
#if 0
|
1123 |
printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
1124 |
env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
1125 |
#endif
|
1126 |
env->crf[0] &= ~0x1; |
1127 |
ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
1128 |
env->gpr[5], env->gpr[6], env->gpr[7], |
1129 |
env->gpr[8]);
|
1130 |
if (ret > (uint32_t)(-515)) { |
1131 |
env->crf[0] |= 0x1; |
1132 |
ret = -ret; |
1133 |
} |
1134 |
env->gpr[3] = ret;
|
1135 |
#if 0
|
1136 |
printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
1137 |
#endif
|
1138 |
break;
|
1139 |
case EXCP_INTERRUPT:
|
1140 |
/* just indicate that signals should be handled asap */
|
1141 |
break;
|
1142 |
default:
|
1143 |
cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
|
1144 |
break;
|
1145 |
} |
1146 |
process_pending_signals(env); |
1147 |
} |
1148 |
} |
1149 |
#endif
|
1150 |
|
1151 |
#ifdef TARGET_MIPS
|
1152 |
|
1153 |
#define MIPS_SYS(name, args) args,
|
1154 |
|
1155 |
static const uint8_t mips_syscall_args[] = { |
1156 |
MIPS_SYS(sys_syscall , 0) /* 4000 */ |
1157 |
MIPS_SYS(sys_exit , 1)
|
1158 |
MIPS_SYS(sys_fork , 0)
|
1159 |
MIPS_SYS(sys_read , 3)
|
1160 |
MIPS_SYS(sys_write , 3)
|
1161 |
MIPS_SYS(sys_open , 3) /* 4005 */ |
1162 |
MIPS_SYS(sys_close , 1)
|
1163 |
MIPS_SYS(sys_waitpid , 3)
|
1164 |
MIPS_SYS(sys_creat , 2)
|
1165 |
MIPS_SYS(sys_link , 2)
|
1166 |
MIPS_SYS(sys_unlink , 1) /* 4010 */ |
1167 |
MIPS_SYS(sys_execve , 0)
|
1168 |
MIPS_SYS(sys_chdir , 1)
|
1169 |
MIPS_SYS(sys_time , 1)
|
1170 |
MIPS_SYS(sys_mknod , 3)
|
1171 |
MIPS_SYS(sys_chmod , 2) /* 4015 */ |
1172 |
MIPS_SYS(sys_lchown , 3)
|
1173 |
MIPS_SYS(sys_ni_syscall , 0)
|
1174 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ |
1175 |
MIPS_SYS(sys_lseek , 3)
|
1176 |
MIPS_SYS(sys_getpid , 0) /* 4020 */ |
1177 |
MIPS_SYS(sys_mount , 5)
|
1178 |
MIPS_SYS(sys_oldumount , 1)
|
1179 |
MIPS_SYS(sys_setuid , 1)
|
1180 |
MIPS_SYS(sys_getuid , 0)
|
1181 |
MIPS_SYS(sys_stime , 1) /* 4025 */ |
1182 |
MIPS_SYS(sys_ptrace , 4)
|
1183 |
MIPS_SYS(sys_alarm , 1)
|
1184 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ |
1185 |
MIPS_SYS(sys_pause , 0)
|
1186 |
MIPS_SYS(sys_utime , 2) /* 4030 */ |
1187 |
MIPS_SYS(sys_ni_syscall , 0)
|
1188 |
MIPS_SYS(sys_ni_syscall , 0)
|
1189 |
MIPS_SYS(sys_access , 2)
|
1190 |
MIPS_SYS(sys_nice , 1)
|
1191 |
MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ |
1192 |
MIPS_SYS(sys_sync , 0)
|
1193 |
MIPS_SYS(sys_kill , 2)
|
1194 |
MIPS_SYS(sys_rename , 2)
|
1195 |
MIPS_SYS(sys_mkdir , 2)
|
1196 |
MIPS_SYS(sys_rmdir , 1) /* 4040 */ |
1197 |
MIPS_SYS(sys_dup , 1)
|
1198 |
MIPS_SYS(sys_pipe , 0)
|
1199 |
MIPS_SYS(sys_times , 1)
|
1200 |
MIPS_SYS(sys_ni_syscall , 0)
|
1201 |
MIPS_SYS(sys_brk , 1) /* 4045 */ |
1202 |
MIPS_SYS(sys_setgid , 1)
|
1203 |
MIPS_SYS(sys_getgid , 0)
|
1204 |
MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ |
1205 |
MIPS_SYS(sys_geteuid , 0)
|
1206 |
MIPS_SYS(sys_getegid , 0) /* 4050 */ |
1207 |
MIPS_SYS(sys_acct , 0)
|
1208 |
MIPS_SYS(sys_umount , 2)
|
1209 |
MIPS_SYS(sys_ni_syscall , 0)
|
1210 |
MIPS_SYS(sys_ioctl , 3)
|
1211 |
MIPS_SYS(sys_fcntl , 3) /* 4055 */ |
1212 |
MIPS_SYS(sys_ni_syscall , 2)
|
1213 |
MIPS_SYS(sys_setpgid , 2)
|
1214 |
MIPS_SYS(sys_ni_syscall , 0)
|
1215 |
MIPS_SYS(sys_olduname , 1)
|
1216 |
MIPS_SYS(sys_umask , 1) /* 4060 */ |
1217 |
MIPS_SYS(sys_chroot , 1)
|
1218 |
MIPS_SYS(sys_ustat , 2)
|
1219 |
MIPS_SYS(sys_dup2 , 2)
|
1220 |
MIPS_SYS(sys_getppid , 0)
|
1221 |
MIPS_SYS(sys_getpgrp , 0) /* 4065 */ |
1222 |
MIPS_SYS(sys_setsid , 0)
|
1223 |
MIPS_SYS(sys_sigaction , 3)
|
1224 |
MIPS_SYS(sys_sgetmask , 0)
|
1225 |
MIPS_SYS(sys_ssetmask , 1)
|
1226 |
MIPS_SYS(sys_setreuid , 2) /* 4070 */ |
1227 |
MIPS_SYS(sys_setregid , 2)
|
1228 |
MIPS_SYS(sys_sigsuspend , 0)
|
1229 |
MIPS_SYS(sys_sigpending , 1)
|
1230 |
MIPS_SYS(sys_sethostname , 2)
|
1231 |
MIPS_SYS(sys_setrlimit , 2) /* 4075 */ |
1232 |
MIPS_SYS(sys_getrlimit , 2)
|
1233 |
MIPS_SYS(sys_getrusage , 2)
|
1234 |
MIPS_SYS(sys_gettimeofday, 2)
|
1235 |
MIPS_SYS(sys_settimeofday, 2)
|
1236 |
MIPS_SYS(sys_getgroups , 2) /* 4080 */ |
1237 |
MIPS_SYS(sys_setgroups , 2)
|
1238 |
MIPS_SYS(sys_ni_syscall , 0) /* old_select */ |
1239 |
MIPS_SYS(sys_symlink , 2)
|
1240 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ |
1241 |
MIPS_SYS(sys_readlink , 3) /* 4085 */ |
1242 |
MIPS_SYS(sys_uselib , 1)
|
1243 |
MIPS_SYS(sys_swapon , 2)
|
1244 |
MIPS_SYS(sys_reboot , 3)
|
1245 |
MIPS_SYS(old_readdir , 3)
|
1246 |
MIPS_SYS(old_mmap , 6) /* 4090 */ |
1247 |
MIPS_SYS(sys_munmap , 2)
|
1248 |
MIPS_SYS(sys_truncate , 2)
|
1249 |
MIPS_SYS(sys_ftruncate , 2)
|
1250 |
MIPS_SYS(sys_fchmod , 2)
|
1251 |
MIPS_SYS(sys_fchown , 3) /* 4095 */ |
1252 |
MIPS_SYS(sys_getpriority , 2)
|
1253 |
MIPS_SYS(sys_setpriority , 3)
|
1254 |
MIPS_SYS(sys_ni_syscall , 0)
|
1255 |
MIPS_SYS(sys_statfs , 2)
|
1256 |
MIPS_SYS(sys_fstatfs , 2) /* 4100 */ |
1257 |
MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ |
1258 |
MIPS_SYS(sys_socketcall , 2)
|
1259 |
MIPS_SYS(sys_syslog , 3)
|
1260 |
MIPS_SYS(sys_setitimer , 3)
|
1261 |
MIPS_SYS(sys_getitimer , 2) /* 4105 */ |
1262 |
MIPS_SYS(sys_newstat , 2)
|
1263 |
MIPS_SYS(sys_newlstat , 2)
|
1264 |
MIPS_SYS(sys_newfstat , 2)
|
1265 |
MIPS_SYS(sys_uname , 1)
|
1266 |
MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ |
1267 |
MIPS_SYS(sys_vhangup , 0)
|
1268 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ |
1269 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ |
1270 |
MIPS_SYS(sys_wait4 , 4)
|
1271 |
MIPS_SYS(sys_swapoff , 1) /* 4115 */ |
1272 |
MIPS_SYS(sys_sysinfo , 1)
|
1273 |
MIPS_SYS(sys_ipc , 6)
|
1274 |
MIPS_SYS(sys_fsync , 1)
|
1275 |
MIPS_SYS(sys_sigreturn , 0)
|
1276 |
MIPS_SYS(sys_clone , 0) /* 4120 */ |
1277 |
MIPS_SYS(sys_setdomainname, 2)
|
1278 |
MIPS_SYS(sys_newuname , 1)
|
1279 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ |
1280 |
MIPS_SYS(sys_adjtimex , 1)
|
1281 |
MIPS_SYS(sys_mprotect , 3) /* 4125 */ |
1282 |
MIPS_SYS(sys_sigprocmask , 3)
|
1283 |
MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ |
1284 |
MIPS_SYS(sys_init_module , 5)
|
1285 |
MIPS_SYS(sys_delete_module, 1)
|
1286 |
MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ |
1287 |
MIPS_SYS(sys_quotactl , 0)
|
1288 |
MIPS_SYS(sys_getpgid , 1)
|
1289 |
MIPS_SYS(sys_fchdir , 1)
|
1290 |
MIPS_SYS(sys_bdflush , 2)
|
1291 |
MIPS_SYS(sys_sysfs , 3) /* 4135 */ |
1292 |
MIPS_SYS(sys_personality , 1)
|
1293 |
MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ |
1294 |
MIPS_SYS(sys_setfsuid , 1)
|
1295 |
MIPS_SYS(sys_setfsgid , 1)
|
1296 |
MIPS_SYS(sys_llseek , 5) /* 4140 */ |
1297 |
MIPS_SYS(sys_getdents , 3)
|
1298 |
MIPS_SYS(sys_select , 5)
|
1299 |
MIPS_SYS(sys_flock , 2)
|
1300 |
MIPS_SYS(sys_msync , 3)
|
1301 |
MIPS_SYS(sys_readv , 3) /* 4145 */ |
1302 |
MIPS_SYS(sys_writev , 3)
|
1303 |
MIPS_SYS(sys_cacheflush , 3)
|
1304 |
MIPS_SYS(sys_cachectl , 3)
|
1305 |
MIPS_SYS(sys_sysmips , 4)
|
1306 |
MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ |
1307 |
MIPS_SYS(sys_getsid , 1)
|
1308 |
MIPS_SYS(sys_fdatasync , 0)
|
1309 |
MIPS_SYS(sys_sysctl , 1)
|
1310 |
MIPS_SYS(sys_mlock , 2)
|
1311 |
MIPS_SYS(sys_munlock , 2) /* 4155 */ |
1312 |
MIPS_SYS(sys_mlockall , 1)
|
1313 |
MIPS_SYS(sys_munlockall , 0)
|
1314 |
MIPS_SYS(sys_sched_setparam, 2)
|
1315 |
MIPS_SYS(sys_sched_getparam, 2)
|
1316 |
MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ |
1317 |
MIPS_SYS(sys_sched_getscheduler, 1)
|
1318 |
MIPS_SYS(sys_sched_yield , 0)
|
1319 |
MIPS_SYS(sys_sched_get_priority_max, 1)
|
1320 |
MIPS_SYS(sys_sched_get_priority_min, 1)
|
1321 |
MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ |
1322 |
MIPS_SYS(sys_nanosleep, 2)
|
1323 |
MIPS_SYS(sys_mremap , 4)
|
1324 |
MIPS_SYS(sys_accept , 3)
|
1325 |
MIPS_SYS(sys_bind , 3)
|
1326 |
MIPS_SYS(sys_connect , 3) /* 4170 */ |
1327 |
MIPS_SYS(sys_getpeername , 3)
|
1328 |
MIPS_SYS(sys_getsockname , 3)
|
1329 |
MIPS_SYS(sys_getsockopt , 5)
|
1330 |
MIPS_SYS(sys_listen , 2)
|
1331 |
MIPS_SYS(sys_recv , 4) /* 4175 */ |
1332 |
MIPS_SYS(sys_recvfrom , 6)
|
1333 |
MIPS_SYS(sys_recvmsg , 3)
|
1334 |
MIPS_SYS(sys_send , 4)
|
1335 |
MIPS_SYS(sys_sendmsg , 3)
|
1336 |
MIPS_SYS(sys_sendto , 6) /* 4180 */ |
1337 |
MIPS_SYS(sys_setsockopt , 5)
|
1338 |
MIPS_SYS(sys_shutdown , 2)
|
1339 |
MIPS_SYS(sys_socket , 3)
|
1340 |
MIPS_SYS(sys_socketpair , 4)
|
1341 |
MIPS_SYS(sys_setresuid , 3) /* 4185 */ |
1342 |
MIPS_SYS(sys_getresuid , 3)
|
1343 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ |
1344 |
MIPS_SYS(sys_poll , 3)
|
1345 |
MIPS_SYS(sys_nfsservctl , 3)
|
1346 |
MIPS_SYS(sys_setresgid , 3) /* 4190 */ |
1347 |
MIPS_SYS(sys_getresgid , 3)
|
1348 |
MIPS_SYS(sys_prctl , 5)
|
1349 |
MIPS_SYS(sys_rt_sigreturn, 0)
|
1350 |
MIPS_SYS(sys_rt_sigaction, 4)
|
1351 |
MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ |
1352 |
MIPS_SYS(sys_rt_sigpending, 2)
|
1353 |
MIPS_SYS(sys_rt_sigtimedwait, 4)
|
1354 |
MIPS_SYS(sys_rt_sigqueueinfo, 3)
|
1355 |
MIPS_SYS(sys_rt_sigsuspend, 0)
|
1356 |
MIPS_SYS(sys_pread64 , 6) /* 4200 */ |
1357 |
MIPS_SYS(sys_pwrite64 , 6)
|
1358 |
MIPS_SYS(sys_chown , 3)
|
1359 |
MIPS_SYS(sys_getcwd , 2)
|
1360 |
MIPS_SYS(sys_capget , 2)
|
1361 |
MIPS_SYS(sys_capset , 2) /* 4205 */ |
1362 |
MIPS_SYS(sys_sigaltstack , 0)
|
1363 |
MIPS_SYS(sys_sendfile , 4)
|
1364 |
MIPS_SYS(sys_ni_syscall , 0)
|
1365 |
MIPS_SYS(sys_ni_syscall , 0)
|
1366 |
MIPS_SYS(sys_mmap2 , 6) /* 4210 */ |
1367 |
MIPS_SYS(sys_truncate64 , 4)
|
1368 |
MIPS_SYS(sys_ftruncate64 , 4)
|
1369 |
MIPS_SYS(sys_stat64 , 2)
|
1370 |
MIPS_SYS(sys_lstat64 , 2)
|
1371 |
MIPS_SYS(sys_fstat64 , 2) /* 4215 */ |
1372 |
MIPS_SYS(sys_pivot_root , 2)
|
1373 |
MIPS_SYS(sys_mincore , 3)
|
1374 |
MIPS_SYS(sys_madvise , 3)
|
1375 |
MIPS_SYS(sys_getdents64 , 3)
|
1376 |
MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ |
1377 |
MIPS_SYS(sys_ni_syscall , 0)
|
1378 |
MIPS_SYS(sys_gettid , 0)
|
1379 |
MIPS_SYS(sys_readahead , 5)
|
1380 |
MIPS_SYS(sys_setxattr , 5)
|
1381 |
MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ |
1382 |
MIPS_SYS(sys_fsetxattr , 5)
|
1383 |
MIPS_SYS(sys_getxattr , 4)
|
1384 |
MIPS_SYS(sys_lgetxattr , 4)
|
1385 |
MIPS_SYS(sys_fgetxattr , 4)
|
1386 |
MIPS_SYS(sys_listxattr , 3) /* 4230 */ |
1387 |
MIPS_SYS(sys_llistxattr , 3)
|
1388 |
MIPS_SYS(sys_flistxattr , 3)
|
1389 |
MIPS_SYS(sys_removexattr , 2)
|
1390 |
MIPS_SYS(sys_lremovexattr, 2)
|
1391 |
MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ |
1392 |
MIPS_SYS(sys_tkill , 2)
|
1393 |
MIPS_SYS(sys_sendfile64 , 5)
|
1394 |
MIPS_SYS(sys_futex , 2)
|
1395 |
MIPS_SYS(sys_sched_setaffinity, 3)
|
1396 |
MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ |
1397 |
MIPS_SYS(sys_io_setup , 2)
|
1398 |
MIPS_SYS(sys_io_destroy , 1)
|
1399 |
MIPS_SYS(sys_io_getevents, 5)
|
1400 |
MIPS_SYS(sys_io_submit , 3)
|
1401 |
MIPS_SYS(sys_io_cancel , 3) /* 4245 */ |
1402 |
MIPS_SYS(sys_exit_group , 1)
|
1403 |
MIPS_SYS(sys_lookup_dcookie, 3)
|
1404 |
MIPS_SYS(sys_epoll_create, 1)
|
1405 |
MIPS_SYS(sys_epoll_ctl , 4)
|
1406 |
MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ |
1407 |
MIPS_SYS(sys_remap_file_pages, 5)
|
1408 |
MIPS_SYS(sys_set_tid_address, 1)
|
1409 |
MIPS_SYS(sys_restart_syscall, 0)
|
1410 |
MIPS_SYS(sys_fadvise64_64, 7)
|
1411 |
MIPS_SYS(sys_statfs64 , 3) /* 4255 */ |
1412 |
MIPS_SYS(sys_fstatfs64 , 2)
|
1413 |
MIPS_SYS(sys_timer_create, 3)
|
1414 |
MIPS_SYS(sys_timer_settime, 4)
|
1415 |
MIPS_SYS(sys_timer_gettime, 2)
|
1416 |
MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ |
1417 |
MIPS_SYS(sys_timer_delete, 1)
|
1418 |
MIPS_SYS(sys_clock_settime, 2)
|
1419 |
MIPS_SYS(sys_clock_gettime, 2)
|
1420 |
MIPS_SYS(sys_clock_getres, 2)
|
1421 |
MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ |
1422 |
MIPS_SYS(sys_tgkill , 3)
|
1423 |
MIPS_SYS(sys_utimes , 2)
|
1424 |
MIPS_SYS(sys_mbind , 4)
|
1425 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ |
1426 |
MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ |
1427 |
MIPS_SYS(sys_mq_open , 4)
|
1428 |
MIPS_SYS(sys_mq_unlink , 1)
|
1429 |
MIPS_SYS(sys_mq_timedsend, 5)
|
1430 |
MIPS_SYS(sys_mq_timedreceive, 5)
|
1431 |
MIPS_SYS(sys_mq_notify , 2) /* 4275 */ |
1432 |
MIPS_SYS(sys_mq_getsetattr, 3)
|
1433 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ |
1434 |
MIPS_SYS(sys_waitid , 4)
|
1435 |
MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ |
1436 |
MIPS_SYS(sys_add_key , 5)
|
1437 |
MIPS_SYS(sys_request_key, 4)
|
1438 |
MIPS_SYS(sys_keyctl , 5)
|
1439 |
MIPS_SYS(sys_set_thread_area, 1)
|
1440 |
MIPS_SYS(sys_inotify_init, 0)
|
1441 |
MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ |
1442 |
MIPS_SYS(sys_inotify_rm_watch, 2)
|
1443 |
MIPS_SYS(sys_migrate_pages, 4)
|
1444 |
MIPS_SYS(sys_openat, 4)
|
1445 |
MIPS_SYS(sys_mkdirat, 3)
|
1446 |
MIPS_SYS(sys_mknodat, 4) /* 4290 */ |
1447 |
MIPS_SYS(sys_fchownat, 5)
|
1448 |
MIPS_SYS(sys_futimesat, 3)
|
1449 |
MIPS_SYS(sys_fstatat64, 4)
|
1450 |
MIPS_SYS(sys_unlinkat, 3)
|
1451 |
MIPS_SYS(sys_renameat, 4) /* 4295 */ |
1452 |
MIPS_SYS(sys_linkat, 5)
|
1453 |
MIPS_SYS(sys_symlinkat, 3)
|
1454 |
MIPS_SYS(sys_readlinkat, 4)
|
1455 |
MIPS_SYS(sys_fchmodat, 3)
|
1456 |
MIPS_SYS(sys_faccessat, 3) /* 4300 */ |
1457 |
MIPS_SYS(sys_pselect6, 6)
|
1458 |
MIPS_SYS(sys_ppoll, 5)
|
1459 |
MIPS_SYS(sys_unshare, 1)
|
1460 |
MIPS_SYS(sys_splice, 4)
|
1461 |
MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ |
1462 |
MIPS_SYS(sys_tee, 4)
|
1463 |
MIPS_SYS(sys_vmsplice, 4)
|
1464 |
MIPS_SYS(sys_move_pages, 6)
|
1465 |
MIPS_SYS(sys_set_robust_list, 2)
|
1466 |
MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ |
1467 |
MIPS_SYS(sys_kexec_load, 4)
|
1468 |
MIPS_SYS(sys_getcpu, 3)
|
1469 |
MIPS_SYS(sys_epoll_pwait, 6)
|
1470 |
MIPS_SYS(sys_ioprio_set, 3)
|
1471 |
MIPS_SYS(sys_ioprio_get, 2)
|
1472 |
}; |
1473 |
|
1474 |
#undef MIPS_SYS
|
1475 |
|
1476 |
void cpu_loop(CPUMIPSState *env)
|
1477 |
{ |
1478 |
target_siginfo_t info; |
1479 |
int trapnr, ret;
|
1480 |
unsigned int syscall_num; |
1481 |
|
1482 |
for(;;) {
|
1483 |
trapnr = cpu_mips_exec(env); |
1484 |
switch(trapnr) {
|
1485 |
case EXCP_SYSCALL:
|
1486 |
syscall_num = env->gpr[2][env->current_tc] - 4000; |
1487 |
env->PC[env->current_tc] += 4;
|
1488 |
if (syscall_num >= sizeof(mips_syscall_args)) { |
1489 |
ret = -ENOSYS; |
1490 |
} else {
|
1491 |
int nb_args;
|
1492 |
target_ulong sp_reg; |
1493 |
target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; |
1494 |
|
1495 |
nb_args = mips_syscall_args[syscall_num]; |
1496 |
sp_reg = env->gpr[29][env->current_tc];
|
1497 |
switch (nb_args) {
|
1498 |
/* these arguments are taken from the stack */
|
1499 |
case 8: arg8 = tgetl(sp_reg + 28); |
1500 |
case 7: arg7 = tgetl(sp_reg + 24); |
1501 |
case 6: arg6 = tgetl(sp_reg + 20); |
1502 |
case 5: arg5 = tgetl(sp_reg + 16); |
1503 |
default:
|
1504 |
break;
|
1505 |
} |
1506 |
ret = do_syscall(env, env->gpr[2][env->current_tc],
|
1507 |
env->gpr[4][env->current_tc],
|
1508 |
env->gpr[5][env->current_tc],
|
1509 |
env->gpr[6][env->current_tc],
|
1510 |
env->gpr[7][env->current_tc],
|
1511 |
arg5, arg6/*, arg7, arg8*/);
|
1512 |
} |
1513 |
if ((unsigned int)ret >= (unsigned int)(-1133)) { |
1514 |
env->gpr[7][env->current_tc] = 1; /* error flag */ |
1515 |
ret = -ret; |
1516 |
} else {
|
1517 |
env->gpr[7][env->current_tc] = 0; /* error flag */ |
1518 |
} |
1519 |
env->gpr[2][env->current_tc] = ret;
|
1520 |
break;
|
1521 |
case EXCP_TLBL:
|
1522 |
case EXCP_TLBS:
|
1523 |
case EXCP_CpU:
|
1524 |
case EXCP_RI:
|
1525 |
info.si_signo = TARGET_SIGILL; |
1526 |
info.si_errno = 0;
|
1527 |
info.si_code = 0;
|
1528 |
queue_signal(info.si_signo, &info); |
1529 |
break;
|
1530 |
case EXCP_INTERRUPT:
|
1531 |
/* just indicate that signals should be handled asap */
|
1532 |
break;
|
1533 |
case EXCP_DEBUG:
|
1534 |
{ |
1535 |
int sig;
|
1536 |
|
1537 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1538 |
if (sig)
|
1539 |
{ |
1540 |
info.si_signo = sig; |
1541 |
info.si_errno = 0;
|
1542 |
info.si_code = TARGET_TRAP_BRKPT; |
1543 |
queue_signal(info.si_signo, &info); |
1544 |
} |
1545 |
} |
1546 |
break;
|
1547 |
default:
|
1548 |
// error:
|
1549 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
1550 |
trapnr); |
1551 |
cpu_dump_state(env, stderr, fprintf, 0);
|
1552 |
abort(); |
1553 |
} |
1554 |
process_pending_signals(env); |
1555 |
} |
1556 |
} |
1557 |
#endif
|
1558 |
|
1559 |
#ifdef TARGET_SH4
|
1560 |
void cpu_loop (CPUState *env)
|
1561 |
{ |
1562 |
int trapnr, ret;
|
1563 |
target_siginfo_t info; |
1564 |
|
1565 |
while (1) { |
1566 |
trapnr = cpu_sh4_exec (env); |
1567 |
|
1568 |
switch (trapnr) {
|
1569 |
case 0x160: |
1570 |
ret = do_syscall(env, |
1571 |
env->gregs[3],
|
1572 |
env->gregs[4],
|
1573 |
env->gregs[5],
|
1574 |
env->gregs[6],
|
1575 |
env->gregs[7],
|
1576 |
env->gregs[0],
|
1577 |
0);
|
1578 |
env->gregs[0] = ret;
|
1579 |
env->pc += 2;
|
1580 |
break;
|
1581 |
case EXCP_DEBUG:
|
1582 |
{ |
1583 |
int sig;
|
1584 |
|
1585 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1586 |
if (sig)
|
1587 |
{ |
1588 |
info.si_signo = sig; |
1589 |
info.si_errno = 0;
|
1590 |
info.si_code = TARGET_TRAP_BRKPT; |
1591 |
queue_signal(info.si_signo, &info); |
1592 |
} |
1593 |
} |
1594 |
break;
|
1595 |
default:
|
1596 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
1597 |
cpu_dump_state(env, stderr, fprintf, 0);
|
1598 |
exit (1);
|
1599 |
} |
1600 |
process_pending_signals (env); |
1601 |
} |
1602 |
} |
1603 |
#endif
|
1604 |
|
1605 |
#ifdef TARGET_CRIS
|
1606 |
void cpu_loop (CPUState *env)
|
1607 |
{ |
1608 |
int trapnr, ret;
|
1609 |
target_siginfo_t info; |
1610 |
|
1611 |
while (1) { |
1612 |
trapnr = cpu_cris_exec (env); |
1613 |
switch (trapnr) {
|
1614 |
case 0xaa: |
1615 |
{ |
1616 |
info.si_signo = SIGSEGV; |
1617 |
info.si_errno = 0;
|
1618 |
/* XXX: check env->error_code */
|
1619 |
info.si_code = TARGET_SEGV_MAPERR; |
1620 |
info._sifields._sigfault._addr = env->debug1; |
1621 |
queue_signal(info.si_signo, &info); |
1622 |
} |
1623 |
break;
|
1624 |
case EXCP_BREAK:
|
1625 |
ret = do_syscall(env, |
1626 |
env->regs[9],
|
1627 |
env->regs[10],
|
1628 |
env->regs[11],
|
1629 |
env->regs[12],
|
1630 |
env->regs[13],
|
1631 |
env->pregs[7],
|
1632 |
env->pregs[11]);
|
1633 |
env->regs[10] = ret;
|
1634 |
env->pc += 2;
|
1635 |
break;
|
1636 |
case EXCP_DEBUG:
|
1637 |
{ |
1638 |
int sig;
|
1639 |
|
1640 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1641 |
if (sig)
|
1642 |
{ |
1643 |
info.si_signo = sig; |
1644 |
info.si_errno = 0;
|
1645 |
info.si_code = TARGET_TRAP_BRKPT; |
1646 |
queue_signal(info.si_signo, &info); |
1647 |
} |
1648 |
} |
1649 |
break;
|
1650 |
default:
|
1651 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
1652 |
cpu_dump_state(env, stderr, fprintf, 0);
|
1653 |
exit (1);
|
1654 |
} |
1655 |
process_pending_signals (env); |
1656 |
} |
1657 |
} |
1658 |
#endif
|
1659 |
|
1660 |
#ifdef TARGET_M68K
|
1661 |
|
1662 |
void cpu_loop(CPUM68KState *env)
|
1663 |
{ |
1664 |
int trapnr;
|
1665 |
unsigned int n; |
1666 |
target_siginfo_t info; |
1667 |
TaskState *ts = env->opaque; |
1668 |
|
1669 |
for(;;) {
|
1670 |
trapnr = cpu_m68k_exec(env); |
1671 |
switch(trapnr) {
|
1672 |
case EXCP_ILLEGAL:
|
1673 |
{ |
1674 |
if (ts->sim_syscalls) {
|
1675 |
uint16_t nr; |
1676 |
nr = lduw(env->pc + 2);
|
1677 |
env->pc += 4;
|
1678 |
do_m68k_simcall(env, nr); |
1679 |
} else {
|
1680 |
goto do_sigill;
|
1681 |
} |
1682 |
} |
1683 |
break;
|
1684 |
case EXCP_HALT_INSN:
|
1685 |
/* Semihosing syscall. */
|
1686 |
env->pc += 4;
|
1687 |
do_m68k_semihosting(env, env->dregs[0]);
|
1688 |
break;
|
1689 |
case EXCP_LINEA:
|
1690 |
case EXCP_LINEF:
|
1691 |
case EXCP_UNSUPPORTED:
|
1692 |
do_sigill:
|
1693 |
info.si_signo = SIGILL; |
1694 |
info.si_errno = 0;
|
1695 |
info.si_code = TARGET_ILL_ILLOPN; |
1696 |
info._sifields._sigfault._addr = env->pc; |
1697 |
queue_signal(info.si_signo, &info); |
1698 |
break;
|
1699 |
case EXCP_TRAP0:
|
1700 |
{ |
1701 |
ts->sim_syscalls = 0;
|
1702 |
n = env->dregs[0];
|
1703 |
env->pc += 2;
|
1704 |
env->dregs[0] = do_syscall(env,
|
1705 |
n, |
1706 |
env->dregs[1],
|
1707 |
env->dregs[2],
|
1708 |
env->dregs[3],
|
1709 |
env->dregs[4],
|
1710 |
env->dregs[5],
|
1711 |
env->dregs[6]);
|
1712 |
} |
1713 |
break;
|
1714 |
case EXCP_INTERRUPT:
|
1715 |
/* just indicate that signals should be handled asap */
|
1716 |
break;
|
1717 |
case EXCP_ACCESS:
|
1718 |
{ |
1719 |
info.si_signo = SIGSEGV; |
1720 |
info.si_errno = 0;
|
1721 |
/* XXX: check env->error_code */
|
1722 |
info.si_code = TARGET_SEGV_MAPERR; |
1723 |
info._sifields._sigfault._addr = env->mmu.ar; |
1724 |
queue_signal(info.si_signo, &info); |
1725 |
} |
1726 |
break;
|
1727 |
case EXCP_DEBUG:
|
1728 |
{ |
1729 |
int sig;
|
1730 |
|
1731 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1732 |
if (sig)
|
1733 |
{ |
1734 |
info.si_signo = sig; |
1735 |
info.si_errno = 0;
|
1736 |
info.si_code = TARGET_TRAP_BRKPT; |
1737 |
queue_signal(info.si_signo, &info); |
1738 |
} |
1739 |
} |
1740 |
break;
|
1741 |
default:
|
1742 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
1743 |
trapnr); |
1744 |
cpu_dump_state(env, stderr, fprintf, 0);
|
1745 |
abort(); |
1746 |
} |
1747 |
process_pending_signals(env); |
1748 |
} |
1749 |
} |
1750 |
#endif /* TARGET_M68K */ |
1751 |
|
1752 |
#ifdef TARGET_ALPHA
|
1753 |
void cpu_loop (CPUState *env)
|
1754 |
{ |
1755 |
int trapnr;
|
1756 |
target_siginfo_t info; |
1757 |
|
1758 |
while (1) { |
1759 |
trapnr = cpu_alpha_exec (env); |
1760 |
|
1761 |
switch (trapnr) {
|
1762 |
case EXCP_RESET:
|
1763 |
fprintf(stderr, "Reset requested. Exit\n");
|
1764 |
exit(1);
|
1765 |
break;
|
1766 |
case EXCP_MCHK:
|
1767 |
fprintf(stderr, "Machine check exception. Exit\n");
|
1768 |
exit(1);
|
1769 |
break;
|
1770 |
case EXCP_ARITH:
|
1771 |
fprintf(stderr, "Arithmetic trap.\n");
|
1772 |
exit(1);
|
1773 |
break;
|
1774 |
case EXCP_HW_INTERRUPT:
|
1775 |
fprintf(stderr, "External interrupt. Exit\n");
|
1776 |
exit(1);
|
1777 |
break;
|
1778 |
case EXCP_DFAULT:
|
1779 |
fprintf(stderr, "MMU data fault\n");
|
1780 |
exit(1);
|
1781 |
break;
|
1782 |
case EXCP_DTB_MISS_PAL:
|
1783 |
fprintf(stderr, "MMU data TLB miss in PALcode\n");
|
1784 |
exit(1);
|
1785 |
break;
|
1786 |
case EXCP_ITB_MISS:
|
1787 |
fprintf(stderr, "MMU instruction TLB miss\n");
|
1788 |
exit(1);
|
1789 |
break;
|
1790 |
case EXCP_ITB_ACV:
|
1791 |
fprintf(stderr, "MMU instruction access violation\n");
|
1792 |
exit(1);
|
1793 |
break;
|
1794 |
case EXCP_DTB_MISS_NATIVE:
|
1795 |
fprintf(stderr, "MMU data TLB miss\n");
|
1796 |
exit(1);
|
1797 |
break;
|
1798 |
case EXCP_UNALIGN:
|
1799 |
fprintf(stderr, "Unaligned access\n");
|
1800 |
exit(1);
|
1801 |
break;
|
1802 |
case EXCP_OPCDEC:
|
1803 |
fprintf(stderr, "Invalid instruction\n");
|
1804 |
exit(1);
|
1805 |
break;
|
1806 |
case EXCP_FEN:
|
1807 |
fprintf(stderr, "Floating-point not allowed\n");
|
1808 |
exit(1);
|
1809 |
break;
|
1810 |
case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): |
1811 |
fprintf(stderr, "Call to PALcode\n");
|
1812 |
call_pal(env, (trapnr >> 6) | 0x80); |
1813 |
break;
|
1814 |
case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): |
1815 |
fprintf(stderr, "Privileged call to PALcode\n");
|
1816 |
exit(1);
|
1817 |
break;
|
1818 |
case EXCP_DEBUG:
|
1819 |
{ |
1820 |
int sig;
|
1821 |
|
1822 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1823 |
if (sig)
|
1824 |
{ |
1825 |
info.si_signo = sig; |
1826 |
info.si_errno = 0;
|
1827 |
info.si_code = TARGET_TRAP_BRKPT; |
1828 |
queue_signal(info.si_signo, &info); |
1829 |
} |
1830 |
} |
1831 |
break;
|
1832 |
default:
|
1833 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
1834 |
cpu_dump_state(env, stderr, fprintf, 0);
|
1835 |
exit (1);
|
1836 |
} |
1837 |
process_pending_signals (env); |
1838 |
} |
1839 |
} |
1840 |
#endif /* TARGET_ALPHA */ |
1841 |
|
1842 |
void usage(void) |
1843 |
{ |
1844 |
printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" |
1845 |
"usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" |
1846 |
"Linux CPU emulator (compiled for %s emulation)\n"
|
1847 |
"\n"
|
1848 |
"-h print this help\n"
|
1849 |
"-g port wait gdb connection to port\n"
|
1850 |
"-L path set the elf interpreter prefix (default=%s)\n"
|
1851 |
"-s size set the stack size in bytes (default=%ld)\n"
|
1852 |
"-cpu model select CPU (-cpu ? for list)\n"
|
1853 |
"-drop-ld-preload drop LD_PRELOAD for target process\n"
|
1854 |
"\n"
|
1855 |
"debug options:\n"
|
1856 |
#ifdef USE_CODE_COPY
|
1857 |
"-no-code-copy disable code copy acceleration\n"
|
1858 |
#endif
|
1859 |
"-d options activate log (logfile=%s)\n"
|
1860 |
"-p pagesize set the host page size to 'pagesize'\n",
|
1861 |
TARGET_ARCH, |
1862 |
interp_prefix, |
1863 |
x86_stack_size, |
1864 |
DEBUG_LOGFILE); |
1865 |
_exit(1);
|
1866 |
} |
1867 |
|
1868 |
/* XXX: currently only used for async signals (see signal.c) */
|
1869 |
CPUState *global_env; |
1870 |
|
1871 |
/* used to free thread contexts */
|
1872 |
TaskState *first_task_state; |
1873 |
|
1874 |
int main(int argc, char **argv) |
1875 |
{ |
1876 |
const char *filename; |
1877 |
const char *cpu_model; |
1878 |
struct target_pt_regs regs1, *regs = ®s1;
|
1879 |
struct image_info info1, *info = &info1;
|
1880 |
TaskState ts1, *ts = &ts1; |
1881 |
CPUState *env; |
1882 |
int optind;
|
1883 |
const char *r; |
1884 |
int gdbstub_port = 0; |
1885 |
int drop_ld_preload = 0, environ_count = 0; |
1886 |
char **target_environ, **wrk, **dst;
|
1887 |
|
1888 |
if (argc <= 1) |
1889 |
usage(); |
1890 |
|
1891 |
/* init debug */
|
1892 |
cpu_set_log_filename(DEBUG_LOGFILE); |
1893 |
|
1894 |
cpu_model = NULL;
|
1895 |
optind = 1;
|
1896 |
for(;;) {
|
1897 |
if (optind >= argc)
|
1898 |
break;
|
1899 |
r = argv[optind]; |
1900 |
if (r[0] != '-') |
1901 |
break;
|
1902 |
optind++; |
1903 |
r++; |
1904 |
if (!strcmp(r, "-")) { |
1905 |
break;
|
1906 |
} else if (!strcmp(r, "d")) { |
1907 |
int mask;
|
1908 |
CPULogItem *item; |
1909 |
|
1910 |
if (optind >= argc)
|
1911 |
break;
|
1912 |
|
1913 |
r = argv[optind++]; |
1914 |
mask = cpu_str_to_log_mask(r); |
1915 |
if (!mask) {
|
1916 |
printf("Log items (comma separated):\n");
|
1917 |
for(item = cpu_log_items; item->mask != 0; item++) { |
1918 |
printf("%-10s %s\n", item->name, item->help);
|
1919 |
} |
1920 |
exit(1);
|
1921 |
} |
1922 |
cpu_set_log(mask); |
1923 |
} else if (!strcmp(r, "s")) { |
1924 |
r = argv[optind++]; |
1925 |
x86_stack_size = strtol(r, (char **)&r, 0); |
1926 |
if (x86_stack_size <= 0) |
1927 |
usage(); |
1928 |
if (*r == 'M') |
1929 |
x86_stack_size *= 1024 * 1024; |
1930 |
else if (*r == 'k' || *r == 'K') |
1931 |
x86_stack_size *= 1024;
|
1932 |
} else if (!strcmp(r, "L")) { |
1933 |
interp_prefix = argv[optind++]; |
1934 |
} else if (!strcmp(r, "p")) { |
1935 |
qemu_host_page_size = atoi(argv[optind++]); |
1936 |
if (qemu_host_page_size == 0 || |
1937 |
(qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
1938 |
fprintf(stderr, "page size must be a power of two\n");
|
1939 |
exit(1);
|
1940 |
} |
1941 |
} else if (!strcmp(r, "g")) { |
1942 |
gdbstub_port = atoi(argv[optind++]); |
1943 |
} else if (!strcmp(r, "r")) { |
1944 |
qemu_uname_release = argv[optind++]; |
1945 |
} else if (!strcmp(r, "cpu")) { |
1946 |
cpu_model = argv[optind++]; |
1947 |
if (strcmp(cpu_model, "?") == 0) { |
1948 |
#if defined(TARGET_PPC)
|
1949 |
ppc_cpu_list(stdout, &fprintf); |
1950 |
#elif defined(TARGET_ARM)
|
1951 |
arm_cpu_list(); |
1952 |
#elif defined(TARGET_MIPS)
|
1953 |
mips_cpu_list(stdout, &fprintf); |
1954 |
#elif defined(TARGET_SPARC)
|
1955 |
sparc_cpu_list(stdout, &fprintf); |
1956 |
#endif
|
1957 |
_exit(1);
|
1958 |
} |
1959 |
} else if (!strcmp(r, "drop-ld-preload")) { |
1960 |
drop_ld_preload = 1;
|
1961 |
} else
|
1962 |
#ifdef USE_CODE_COPY
|
1963 |
if (!strcmp(r, "no-code-copy")) { |
1964 |
code_copy_enabled = 0;
|
1965 |
} else
|
1966 |
#endif
|
1967 |
{ |
1968 |
usage(); |
1969 |
} |
1970 |
} |
1971 |
if (optind >= argc)
|
1972 |
usage(); |
1973 |
filename = argv[optind]; |
1974 |
|
1975 |
/* Zero out regs */
|
1976 |
memset(regs, 0, sizeof(struct target_pt_regs)); |
1977 |
|
1978 |
/* Zero out image_info */
|
1979 |
memset(info, 0, sizeof(struct image_info)); |
1980 |
|
1981 |
/* Scan interp_prefix dir for replacement files. */
|
1982 |
init_paths(interp_prefix); |
1983 |
|
1984 |
/* NOTE: we need to init the CPU at this stage to get
|
1985 |
qemu_host_page_size */
|
1986 |
env = cpu_init(); |
1987 |
global_env = env; |
1988 |
|
1989 |
wrk = environ; |
1990 |
while (*(wrk++))
|
1991 |
environ_count++; |
1992 |
|
1993 |
target_environ = malloc((environ_count + 1) * sizeof(char *)); |
1994 |
if (!target_environ)
|
1995 |
abort(); |
1996 |
for (wrk = environ, dst = target_environ; *wrk; wrk++) {
|
1997 |
if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) |
1998 |
continue;
|
1999 |
*(dst++) = strdup(*wrk); |
2000 |
} |
2001 |
*dst = NULL; /* NULL terminate target_environ */ |
2002 |
|
2003 |
if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { |
2004 |
printf("Error loading %s\n", filename);
|
2005 |
_exit(1);
|
2006 |
} |
2007 |
|
2008 |
for (wrk = target_environ; *wrk; wrk++) {
|
2009 |
free(*wrk); |
2010 |
} |
2011 |
|
2012 |
free(target_environ); |
2013 |
|
2014 |
if (loglevel) {
|
2015 |
page_dump(logfile); |
2016 |
|
2017 |
fprintf(logfile, "start_brk 0x" TARGET_FMT_lx "\n", info->start_brk); |
2018 |
fprintf(logfile, "end_code 0x" TARGET_FMT_lx "\n", info->end_code); |
2019 |
fprintf(logfile, "start_code 0x" TARGET_FMT_lx "\n", |
2020 |
info->start_code); |
2021 |
fprintf(logfile, "start_data 0x" TARGET_FMT_lx "\n", |
2022 |
info->start_data); |
2023 |
fprintf(logfile, "end_data 0x" TARGET_FMT_lx "\n", info->end_data); |
2024 |
fprintf(logfile, "start_stack 0x" TARGET_FMT_lx "\n", |
2025 |
info->start_stack); |
2026 |
fprintf(logfile, "brk 0x" TARGET_FMT_lx "\n", info->brk); |
2027 |
fprintf(logfile, "entry 0x" TARGET_FMT_lx "\n", info->entry); |
2028 |
} |
2029 |
|
2030 |
target_set_brk(info->brk); |
2031 |
syscall_init(); |
2032 |
signal_init(); |
2033 |
|
2034 |
/* build Task State */
|
2035 |
memset(ts, 0, sizeof(TaskState)); |
2036 |
env->opaque = ts; |
2037 |
ts->used = 1;
|
2038 |
ts->info = info; |
2039 |
env->user_mode_only = 1;
|
2040 |
|
2041 |
#if defined(TARGET_I386)
|
2042 |
cpu_x86_set_cpl(env, 3);
|
2043 |
|
2044 |
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
2045 |
env->hflags |= HF_PE_MASK; |
2046 |
if (env->cpuid_features & CPUID_SSE) {
|
2047 |
env->cr[4] |= CR4_OSFXSR_MASK;
|
2048 |
env->hflags |= HF_OSFXSR_MASK; |
2049 |
} |
2050 |
|
2051 |
/* flags setup : we activate the IRQs by default as in user mode */
|
2052 |
env->eflags |= IF_MASK; |
2053 |
|
2054 |
/* linux register setup */
|
2055 |
#if defined(TARGET_X86_64)
|
2056 |
env->regs[R_EAX] = regs->rax; |
2057 |
env->regs[R_EBX] = regs->rbx; |
2058 |
env->regs[R_ECX] = regs->rcx; |
2059 |
env->regs[R_EDX] = regs->rdx; |
2060 |
env->regs[R_ESI] = regs->rsi; |
2061 |
env->regs[R_EDI] = regs->rdi; |
2062 |
env->regs[R_EBP] = regs->rbp; |
2063 |
env->regs[R_ESP] = regs->rsp; |
2064 |
env->eip = regs->rip; |
2065 |
#else
|
2066 |
env->regs[R_EAX] = regs->eax; |
2067 |
env->regs[R_EBX] = regs->ebx; |
2068 |
env->regs[R_ECX] = regs->ecx; |
2069 |
env->regs[R_EDX] = regs->edx; |
2070 |
env->regs[R_ESI] = regs->esi; |
2071 |
env->regs[R_EDI] = regs->edi; |
2072 |
env->regs[R_EBP] = regs->ebp; |
2073 |
env->regs[R_ESP] = regs->esp; |
2074 |
env->eip = regs->eip; |
2075 |
#endif
|
2076 |
|
2077 |
/* linux interrupt setup */
|
2078 |
env->idt.base = h2g(idt_table); |
2079 |
env->idt.limit = sizeof(idt_table) - 1; |
2080 |
set_idt(0, 0); |
2081 |
set_idt(1, 0); |
2082 |
set_idt(2, 0); |
2083 |
set_idt(3, 3); |
2084 |
set_idt(4, 3); |
2085 |
set_idt(5, 3); |
2086 |
set_idt(6, 0); |
2087 |
set_idt(7, 0); |
2088 |
set_idt(8, 0); |
2089 |
set_idt(9, 0); |
2090 |
set_idt(10, 0); |
2091 |
set_idt(11, 0); |
2092 |
set_idt(12, 0); |
2093 |
set_idt(13, 0); |
2094 |
set_idt(14, 0); |
2095 |
set_idt(15, 0); |
2096 |
set_idt(16, 0); |
2097 |
set_idt(17, 0); |
2098 |
set_idt(18, 0); |
2099 |
set_idt(19, 0); |
2100 |
set_idt(0x80, 3); |
2101 |
|
2102 |
/* linux segment setup */
|
2103 |
env->gdt.base = h2g(gdt_table); |
2104 |
env->gdt.limit = sizeof(gdt_table) - 1; |
2105 |
write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
2106 |
DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
2107 |
(3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
2108 |
write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
2109 |
DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
2110 |
(3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
2111 |
cpu_x86_load_seg(env, R_CS, __USER_CS); |
2112 |
cpu_x86_load_seg(env, R_DS, __USER_DS); |
2113 |
cpu_x86_load_seg(env, R_ES, __USER_DS); |
2114 |
cpu_x86_load_seg(env, R_SS, __USER_DS); |
2115 |
cpu_x86_load_seg(env, R_FS, __USER_DS); |
2116 |
cpu_x86_load_seg(env, R_GS, __USER_DS); |
2117 |
|
2118 |
/* This hack makes Wine work... */
|
2119 |
env->segs[R_FS].selector = 0;
|
2120 |
#elif defined(TARGET_ARM)
|
2121 |
{ |
2122 |
int i;
|
2123 |
if (cpu_model == NULL) |
2124 |
cpu_model = "arm926";
|
2125 |
cpu_arm_set_model(env, cpu_model); |
2126 |
cpsr_write(env, regs->uregs[16], 0xffffffff); |
2127 |
for(i = 0; i < 16; i++) { |
2128 |
env->regs[i] = regs->uregs[i]; |
2129 |
} |
2130 |
} |
2131 |
#elif defined(TARGET_SPARC)
|
2132 |
{ |
2133 |
int i;
|
2134 |
const sparc_def_t *def;
|
2135 |
#ifdef TARGET_SPARC64
|
2136 |
if (cpu_model == NULL) |
2137 |
cpu_model = "TI UltraSparc II";
|
2138 |
#else
|
2139 |
if (cpu_model == NULL) |
2140 |
cpu_model = "Fujitsu MB86904";
|
2141 |
#endif
|
2142 |
sparc_find_by_name(cpu_model, &def); |
2143 |
if (def == NULL) { |
2144 |
fprintf(stderr, "Unable to find Sparc CPU definition\n");
|
2145 |
exit(1);
|
2146 |
} |
2147 |
cpu_sparc_register(env, def); |
2148 |
env->pc = regs->pc; |
2149 |
env->npc = regs->npc; |
2150 |
env->y = regs->y; |
2151 |
for(i = 0; i < 8; i++) |
2152 |
env->gregs[i] = regs->u_regs[i]; |
2153 |
for(i = 0; i < 8; i++) |
2154 |
env->regwptr[i] = regs->u_regs[i + 8];
|
2155 |
} |
2156 |
#elif defined(TARGET_PPC)
|
2157 |
{ |
2158 |
ppc_def_t *def; |
2159 |
int i;
|
2160 |
|
2161 |
/* Choose and initialise CPU */
|
2162 |
if (cpu_model == NULL) |
2163 |
cpu_model = "750";
|
2164 |
ppc_find_by_name(cpu_model, &def); |
2165 |
if (def == NULL) { |
2166 |
cpu_abort(env, |
2167 |
"Unable to find PowerPC CPU definition\n");
|
2168 |
} |
2169 |
cpu_ppc_register(env, def); |
2170 |
cpu_ppc_reset(env); |
2171 |
for (i = 0; i < 32; i++) { |
2172 |
if (i != 12 && i != 6 && i != 13) |
2173 |
env->msr[i] = (regs->msr >> i) & 1;
|
2174 |
} |
2175 |
#if defined(TARGET_PPC64)
|
2176 |
msr_sf = 1;
|
2177 |
#endif
|
2178 |
env->nip = regs->nip; |
2179 |
for(i = 0; i < 32; i++) { |
2180 |
env->gpr[i] = regs->gpr[i]; |
2181 |
} |
2182 |
} |
2183 |
#elif defined(TARGET_M68K)
|
2184 |
{ |
2185 |
if (cpu_model == NULL) |
2186 |
cpu_model = "any";
|
2187 |
if (cpu_m68k_set_model(env, cpu_model)) {
|
2188 |
cpu_abort(cpu_single_env, |
2189 |
"Unable to find m68k CPU definition\n");
|
2190 |
} |
2191 |
env->pc = regs->pc; |
2192 |
env->dregs[0] = regs->d0;
|
2193 |
env->dregs[1] = regs->d1;
|
2194 |
env->dregs[2] = regs->d2;
|
2195 |
env->dregs[3] = regs->d3;
|
2196 |
env->dregs[4] = regs->d4;
|
2197 |
env->dregs[5] = regs->d5;
|
2198 |
env->dregs[6] = regs->d6;
|
2199 |
env->dregs[7] = regs->d7;
|
2200 |
env->aregs[0] = regs->a0;
|
2201 |
env->aregs[1] = regs->a1;
|
2202 |
env->aregs[2] = regs->a2;
|
2203 |
env->aregs[3] = regs->a3;
|
2204 |
env->aregs[4] = regs->a4;
|
2205 |
env->aregs[5] = regs->a5;
|
2206 |
env->aregs[6] = regs->a6;
|
2207 |
env->aregs[7] = regs->usp;
|
2208 |
env->sr = regs->sr; |
2209 |
ts->sim_syscalls = 1;
|
2210 |
} |
2211 |
#elif defined(TARGET_MIPS)
|
2212 |
{ |
2213 |
mips_def_t *def; |
2214 |
int i;
|
2215 |
|
2216 |
/* Choose and initialise CPU */
|
2217 |
if (cpu_model == NULL) |
2218 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
2219 |
cpu_model = "20Kc";
|
2220 |
#else
|
2221 |
cpu_model = "24Kf";
|
2222 |
#endif
|
2223 |
mips_find_by_name(cpu_model, &def); |
2224 |
if (def == NULL) |
2225 |
cpu_abort(env, "Unable to find MIPS CPU definition\n");
|
2226 |
cpu_mips_register(env, def); |
2227 |
|
2228 |
for(i = 0; i < 32; i++) { |
2229 |
env->gpr[i][env->current_tc] = regs->regs[i]; |
2230 |
} |
2231 |
env->PC[env->current_tc] = regs->cp0_epc; |
2232 |
} |
2233 |
#elif defined(TARGET_SH4)
|
2234 |
{ |
2235 |
int i;
|
2236 |
|
2237 |
for(i = 0; i < 16; i++) { |
2238 |
env->gregs[i] = regs->regs[i]; |
2239 |
} |
2240 |
env->pc = regs->pc; |
2241 |
} |
2242 |
#elif defined(TARGET_ALPHA)
|
2243 |
{ |
2244 |
int i;
|
2245 |
|
2246 |
for(i = 0; i < 28; i++) { |
2247 |
env->ir[i] = ((target_ulong *)regs)[i]; |
2248 |
} |
2249 |
env->ipr[IPR_USP] = regs->usp; |
2250 |
env->ir[30] = regs->usp;
|
2251 |
env->pc = regs->pc; |
2252 |
env->unique = regs->unique; |
2253 |
} |
2254 |
#elif defined(TARGET_CRIS)
|
2255 |
{ |
2256 |
env->regs[0] = regs->r0;
|
2257 |
env->regs[1] = regs->r1;
|
2258 |
env->regs[2] = regs->r2;
|
2259 |
env->regs[3] = regs->r3;
|
2260 |
env->regs[4] = regs->r4;
|
2261 |
env->regs[5] = regs->r5;
|
2262 |
env->regs[6] = regs->r6;
|
2263 |
env->regs[7] = regs->r7;
|
2264 |
env->regs[8] = regs->r8;
|
2265 |
env->regs[9] = regs->r9;
|
2266 |
env->regs[10] = regs->r10;
|
2267 |
env->regs[11] = regs->r11;
|
2268 |
env->regs[12] = regs->r12;
|
2269 |
env->regs[13] = regs->r13;
|
2270 |
env->regs[14] = info->start_stack;
|
2271 |
env->regs[15] = regs->acr;
|
2272 |
env->pc = regs->erp; |
2273 |
} |
2274 |
#else
|
2275 |
#error unsupported target CPU
|
2276 |
#endif
|
2277 |
|
2278 |
#if defined(TARGET_ARM) || defined(TARGET_M68K)
|
2279 |
ts->stack_base = info->start_stack; |
2280 |
ts->heap_base = info->brk; |
2281 |
/* This will be filled in on the first SYS_HEAPINFO call. */
|
2282 |
ts->heap_limit = 0;
|
2283 |
#endif
|
2284 |
|
2285 |
if (gdbstub_port) {
|
2286 |
gdbserver_start (gdbstub_port); |
2287 |
gdb_handlesig(env, 0);
|
2288 |
} |
2289 |
cpu_loop(env); |
2290 |
/* never exits */
|
2291 |
return 0; |
2292 |
} |