root / tcg / tcg-op.h @ cb63669a
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifdef CONFIG_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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if (GET_TCGV(ret) != GET_TCGV(arg))
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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tcg_temp_free(t0); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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TCGv t0 = tcg_const_i32(arg2); |
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tcg_gen_add_i32(ret, arg1, t0); |
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tcg_temp_free(t0); |
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} |
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} |
367 |
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
371 |
} |
372 |
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
374 |
{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
377 |
tcg_gen_mov_i32(ret, arg1); |
378 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
380 |
tcg_gen_sub_i32(ret, arg1, t0); |
381 |
tcg_temp_free(t0); |
382 |
} |
383 |
} |
384 |
|
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
388 |
} |
389 |
|
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
391 |
{ |
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
394 |
tcg_gen_movi_i32(ret, 0);
|
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} else if (arg2 == 0xffffffff) { |
396 |
tcg_gen_mov_i32(ret, arg1); |
397 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
399 |
tcg_gen_and_i32(ret, arg1, t0); |
400 |
tcg_temp_free(t0); |
401 |
} |
402 |
} |
403 |
|
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
405 |
{ |
406 |
tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
407 |
} |
408 |
|
409 |
static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
410 |
{ |
411 |
/* some cases can be optimized here */
|
412 |
if (arg2 == 0xffffffff) { |
413 |
tcg_gen_movi_i32(ret, 0xffffffff);
|
414 |
} else if (arg2 == 0) { |
415 |
tcg_gen_mov_i32(ret, arg1); |
416 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
418 |
tcg_gen_or_i32(ret, arg1, t0); |
419 |
tcg_temp_free(t0); |
420 |
} |
421 |
} |
422 |
|
423 |
static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
424 |
{ |
425 |
tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
426 |
} |
427 |
|
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
429 |
{ |
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
432 |
tcg_gen_mov_i32(ret, arg1); |
433 |
} else {
|
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TCGv t0 = tcg_const_i32(arg2); |
435 |
tcg_gen_xor_i32(ret, arg1, t0); |
436 |
tcg_temp_free(t0); |
437 |
} |
438 |
} |
439 |
|
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
441 |
{ |
442 |
tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
443 |
} |
444 |
|
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
446 |
{ |
447 |
if (arg2 == 0) { |
448 |
tcg_gen_mov_i32(ret, arg1); |
449 |
} else {
|
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TCGv t0 = tcg_const_i32(arg2); |
451 |
tcg_gen_shl_i32(ret, arg1, t0); |
452 |
tcg_temp_free(t0); |
453 |
} |
454 |
} |
455 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
457 |
{ |
458 |
tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
459 |
} |
460 |
|
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static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
462 |
{ |
463 |
if (arg2 == 0) { |
464 |
tcg_gen_mov_i32(ret, arg1); |
465 |
} else {
|
466 |
TCGv t0 = tcg_const_i32(arg2); |
467 |
tcg_gen_shr_i32(ret, arg1, t0); |
468 |
tcg_temp_free(t0); |
469 |
} |
470 |
} |
471 |
|
472 |
static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
473 |
{ |
474 |
tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
475 |
} |
476 |
|
477 |
static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
478 |
{ |
479 |
if (arg2 == 0) { |
480 |
tcg_gen_mov_i32(ret, arg1); |
481 |
} else {
|
482 |
TCGv t0 = tcg_const_i32(arg2); |
483 |
tcg_gen_sar_i32(ret, arg1, t0); |
484 |
tcg_temp_free(t0); |
485 |
} |
486 |
} |
487 |
|
488 |
static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
489 |
int label_index)
|
490 |
{ |
491 |
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
492 |
} |
493 |
|
494 |
static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, |
495 |
int label_index)
|
496 |
{ |
497 |
TCGv t0 = tcg_const_i32(arg2); |
498 |
tcg_gen_brcond_i32(cond, arg1, t0, label_index); |
499 |
tcg_temp_free(t0); |
500 |
} |
501 |
|
502 |
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
503 |
{ |
504 |
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
505 |
} |
506 |
|
507 |
static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
508 |
{ |
509 |
TCGv t0 = tcg_const_i32(arg2); |
510 |
tcg_gen_mul_i32(ret, arg1, t0); |
511 |
tcg_temp_free(t0); |
512 |
} |
513 |
|
514 |
#ifdef TCG_TARGET_HAS_div_i32
|
515 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
516 |
{ |
517 |
tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
518 |
} |
519 |
|
520 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
521 |
{ |
522 |
tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
523 |
} |
524 |
|
525 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
526 |
{ |
527 |
tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
528 |
} |
529 |
|
530 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
531 |
{ |
532 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
533 |
} |
534 |
#else
|
535 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
536 |
{ |
537 |
TCGv t0; |
538 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
539 |
tcg_gen_sari_i32(t0, arg1, 31);
|
540 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
541 |
tcg_temp_free(t0); |
542 |
} |
543 |
|
544 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
545 |
{ |
546 |
TCGv t0; |
547 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
548 |
tcg_gen_sari_i32(t0, arg1, 31);
|
549 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
550 |
tcg_temp_free(t0); |
551 |
} |
552 |
|
553 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
554 |
{ |
555 |
TCGv t0; |
556 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
557 |
tcg_gen_movi_i32(t0, 0);
|
558 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
559 |
tcg_temp_free(t0); |
560 |
} |
561 |
|
562 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
563 |
{ |
564 |
TCGv t0; |
565 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
566 |
tcg_gen_movi_i32(t0, 0);
|
567 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
568 |
tcg_temp_free(t0); |
569 |
} |
570 |
#endif
|
571 |
|
572 |
#if TCG_TARGET_REG_BITS == 32 |
573 |
|
574 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
575 |
{ |
576 |
if (GET_TCGV(ret) != GET_TCGV(arg)) {
|
577 |
tcg_gen_mov_i32(ret, arg); |
578 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
579 |
} |
580 |
} |
581 |
|
582 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
583 |
{ |
584 |
tcg_gen_movi_i32(ret, arg); |
585 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
586 |
} |
587 |
|
588 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
589 |
{ |
590 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
591 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
592 |
} |
593 |
|
594 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
595 |
{ |
596 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
597 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
598 |
} |
599 |
|
600 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
601 |
{ |
602 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
603 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
604 |
} |
605 |
|
606 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
607 |
{ |
608 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
609 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
610 |
} |
611 |
|
612 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
613 |
{ |
614 |
tcg_gen_ld_i32(ret, arg2, offset); |
615 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
616 |
} |
617 |
|
618 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
619 |
{ |
620 |
tcg_gen_ld_i32(ret, arg2, offset); |
621 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
622 |
} |
623 |
|
624 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
625 |
{ |
626 |
/* since arg2 and ret have different types, they cannot be the
|
627 |
same temporary */
|
628 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
629 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
630 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
631 |
#else
|
632 |
tcg_gen_ld_i32(ret, arg2, offset); |
633 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
634 |
#endif
|
635 |
} |
636 |
|
637 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
638 |
{ |
639 |
tcg_gen_st8_i32(arg1, arg2, offset); |
640 |
} |
641 |
|
642 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
643 |
{ |
644 |
tcg_gen_st16_i32(arg1, arg2, offset); |
645 |
} |
646 |
|
647 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
648 |
{ |
649 |
tcg_gen_st_i32(arg1, arg2, offset); |
650 |
} |
651 |
|
652 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
653 |
{ |
654 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
655 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
656 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
657 |
#else
|
658 |
tcg_gen_st_i32(arg1, arg2, offset); |
659 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
660 |
#endif
|
661 |
} |
662 |
|
663 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
664 |
{ |
665 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
666 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
667 |
} |
668 |
|
669 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
670 |
{ |
671 |
TCGv t0 = tcg_const_i64(arg2); |
672 |
tcg_gen_add_i64(ret, arg1, t0); |
673 |
tcg_temp_free(t0); |
674 |
} |
675 |
|
676 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
677 |
{ |
678 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
679 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
680 |
} |
681 |
|
682 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
683 |
{ |
684 |
TCGv t0 = tcg_const_i64(arg2); |
685 |
tcg_gen_sub_i64(ret, arg1, t0); |
686 |
tcg_temp_free(t0); |
687 |
} |
688 |
|
689 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
690 |
{ |
691 |
tcg_gen_and_i32(ret, arg1, arg2); |
692 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
693 |
} |
694 |
|
695 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
696 |
{ |
697 |
tcg_gen_andi_i32(ret, arg1, arg2); |
698 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
699 |
} |
700 |
|
701 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
702 |
{ |
703 |
tcg_gen_or_i32(ret, arg1, arg2); |
704 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
705 |
} |
706 |
|
707 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
708 |
{ |
709 |
tcg_gen_ori_i32(ret, arg1, arg2); |
710 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
711 |
} |
712 |
|
713 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
714 |
{ |
715 |
tcg_gen_xor_i32(ret, arg1, arg2); |
716 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
717 |
} |
718 |
|
719 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
720 |
{ |
721 |
tcg_gen_xori_i32(ret, arg1, arg2); |
722 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
723 |
} |
724 |
|
725 |
/* XXX: use generic code when basic block handling is OK or CPU
|
726 |
specific code (x86) */
|
727 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
728 |
{ |
729 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
730 |
} |
731 |
|
732 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
733 |
{ |
734 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
735 |
} |
736 |
|
737 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
738 |
{ |
739 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
740 |
} |
741 |
|
742 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
743 |
{ |
744 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
745 |
} |
746 |
|
747 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
748 |
{ |
749 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
750 |
} |
751 |
|
752 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
753 |
{ |
754 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
755 |
} |
756 |
|
757 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
758 |
int label_index)
|
759 |
{ |
760 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
761 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
762 |
cond, label_index); |
763 |
} |
764 |
|
765 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
766 |
{ |
767 |
TCGv t0, t1; |
768 |
|
769 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
770 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
771 |
|
772 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
773 |
|
774 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
775 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
776 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
777 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
778 |
|
779 |
tcg_gen_mov_i64(ret, t0); |
780 |
tcg_temp_free(t0); |
781 |
tcg_temp_free(t1); |
782 |
} |
783 |
|
784 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
785 |
{ |
786 |
TCGv t0 = tcg_const_i64(arg2); |
787 |
tcg_gen_mul_i64(ret, arg1, t0); |
788 |
tcg_temp_free(t0); |
789 |
} |
790 |
|
791 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
792 |
{ |
793 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
794 |
} |
795 |
|
796 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
797 |
{ |
798 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
799 |
} |
800 |
|
801 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
802 |
{ |
803 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
804 |
} |
805 |
|
806 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
807 |
{ |
808 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
809 |
} |
810 |
|
811 |
#else
|
812 |
|
813 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
814 |
{ |
815 |
if (GET_TCGV(ret) != GET_TCGV(arg))
|
816 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
817 |
} |
818 |
|
819 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
820 |
{ |
821 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
822 |
} |
823 |
|
824 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
825 |
tcg_target_long offset) |
826 |
{ |
827 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
828 |
} |
829 |
|
830 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
831 |
tcg_target_long offset) |
832 |
{ |
833 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
834 |
} |
835 |
|
836 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
837 |
tcg_target_long offset) |
838 |
{ |
839 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
840 |
} |
841 |
|
842 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
843 |
tcg_target_long offset) |
844 |
{ |
845 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
846 |
} |
847 |
|
848 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
849 |
tcg_target_long offset) |
850 |
{ |
851 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
852 |
} |
853 |
|
854 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
855 |
tcg_target_long offset) |
856 |
{ |
857 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
858 |
} |
859 |
|
860 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
861 |
{ |
862 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
863 |
} |
864 |
|
865 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
866 |
tcg_target_long offset) |
867 |
{ |
868 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
869 |
} |
870 |
|
871 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
872 |
tcg_target_long offset) |
873 |
{ |
874 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
875 |
} |
876 |
|
877 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
878 |
tcg_target_long offset) |
879 |
{ |
880 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
881 |
} |
882 |
|
883 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
884 |
{ |
885 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
886 |
} |
887 |
|
888 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
889 |
{ |
890 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
891 |
} |
892 |
|
893 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
894 |
{ |
895 |
TCGv t0 = tcg_const_i64(arg2); |
896 |
tcg_gen_add_i64(ret, arg1, t0); |
897 |
tcg_temp_free(t0); |
898 |
} |
899 |
|
900 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
901 |
{ |
902 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
903 |
} |
904 |
|
905 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
906 |
{ |
907 |
TCGv t0 = tcg_const_i64(arg2); |
908 |
tcg_gen_sub_i64(ret, arg1, t0); |
909 |
tcg_temp_free(t0); |
910 |
} |
911 |
|
912 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
913 |
{ |
914 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
915 |
} |
916 |
|
917 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
918 |
{ |
919 |
TCGv t0 = tcg_const_i64(arg2); |
920 |
tcg_gen_and_i64(ret, arg1, t0); |
921 |
tcg_temp_free(t0); |
922 |
} |
923 |
|
924 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
925 |
{ |
926 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
927 |
} |
928 |
|
929 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
930 |
{ |
931 |
TCGv t0 = tcg_const_i64(arg2); |
932 |
tcg_gen_or_i64(ret, arg1, t0); |
933 |
tcg_temp_free(t0); |
934 |
} |
935 |
|
936 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
937 |
{ |
938 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
939 |
} |
940 |
|
941 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
942 |
{ |
943 |
TCGv t0 = tcg_const_i64(arg2); |
944 |
tcg_gen_xor_i64(ret, arg1, t0); |
945 |
tcg_temp_free(t0); |
946 |
} |
947 |
|
948 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
949 |
{ |
950 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
951 |
} |
952 |
|
953 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
954 |
{ |
955 |
if (arg2 == 0) { |
956 |
tcg_gen_mov_i64(ret, arg1); |
957 |
} else {
|
958 |
TCGv t0 = tcg_const_i64(arg2); |
959 |
tcg_gen_shl_i64(ret, arg1, t0); |
960 |
tcg_temp_free(t0); |
961 |
} |
962 |
} |
963 |
|
964 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
965 |
{ |
966 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
967 |
} |
968 |
|
969 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
970 |
{ |
971 |
if (arg2 == 0) { |
972 |
tcg_gen_mov_i64(ret, arg1); |
973 |
} else {
|
974 |
TCGv t0 = tcg_const_i64(arg2); |
975 |
tcg_gen_shr_i64(ret, arg1, t0); |
976 |
tcg_temp_free(t0); |
977 |
} |
978 |
} |
979 |
|
980 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
981 |
{ |
982 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
983 |
} |
984 |
|
985 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
986 |
{ |
987 |
if (arg2 == 0) { |
988 |
tcg_gen_mov_i64(ret, arg1); |
989 |
} else {
|
990 |
TCGv t0 = tcg_const_i64(arg2); |
991 |
tcg_gen_sar_i64(ret, arg1, t0); |
992 |
tcg_temp_free(t0); |
993 |
} |
994 |
} |
995 |
|
996 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
997 |
int label_index)
|
998 |
{ |
999 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
1000 |
} |
1001 |
|
1002 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1003 |
{ |
1004 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
1005 |
} |
1006 |
|
1007 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1008 |
{ |
1009 |
TCGv t0 = tcg_const_i64(arg2); |
1010 |
tcg_gen_mul_i64(ret, arg1, t0); |
1011 |
tcg_temp_free(t0); |
1012 |
} |
1013 |
|
1014 |
#ifdef TCG_TARGET_HAS_div_i64
|
1015 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1016 |
{ |
1017 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
1018 |
} |
1019 |
|
1020 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1021 |
{ |
1022 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
1023 |
} |
1024 |
|
1025 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1026 |
{ |
1027 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
1028 |
} |
1029 |
|
1030 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1031 |
{ |
1032 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
1033 |
} |
1034 |
#else
|
1035 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1036 |
{ |
1037 |
TCGv t0; |
1038 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1039 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1040 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
1041 |
tcg_temp_free(t0); |
1042 |
} |
1043 |
|
1044 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1045 |
{ |
1046 |
TCGv t0; |
1047 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1048 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1049 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
1050 |
tcg_temp_free(t0); |
1051 |
} |
1052 |
|
1053 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1054 |
{ |
1055 |
TCGv t0; |
1056 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1057 |
tcg_gen_movi_i64(t0, 0);
|
1058 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
1059 |
tcg_temp_free(t0); |
1060 |
} |
1061 |
|
1062 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1063 |
{ |
1064 |
TCGv t0; |
1065 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1066 |
tcg_gen_movi_i64(t0, 0);
|
1067 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
1068 |
tcg_temp_free(t0); |
1069 |
} |
1070 |
#endif
|
1071 |
|
1072 |
#endif
|
1073 |
|
1074 |
static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, |
1075 |
int label_index)
|
1076 |
{ |
1077 |
TCGv t0 = tcg_const_i64(arg2); |
1078 |
tcg_gen_brcond_i64(cond, arg1, t0, label_index); |
1079 |
tcg_temp_free(t0); |
1080 |
} |
1081 |
|
1082 |
/***************************************/
|
1083 |
/* optional operations */
|
1084 |
|
1085 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
1086 |
{ |
1087 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
1088 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
1089 |
#else
|
1090 |
tcg_gen_shli_i32(ret, arg, 24);
|
1091 |
tcg_gen_sari_i32(ret, ret, 24);
|
1092 |
#endif
|
1093 |
} |
1094 |
|
1095 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
1096 |
{ |
1097 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
1098 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
1099 |
#else
|
1100 |
tcg_gen_shli_i32(ret, arg, 16);
|
1101 |
tcg_gen_sari_i32(ret, ret, 16);
|
1102 |
#endif
|
1103 |
} |
1104 |
|
1105 |
/* These are currently just for convenience.
|
1106 |
We assume a target will recognise these automatically . */
|
1107 |
static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
1108 |
{ |
1109 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
1110 |
} |
1111 |
|
1112 |
static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
1113 |
{ |
1114 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
1115 |
} |
1116 |
|
1117 |
/* Note: we assume the two high bytes are set to zero */
|
1118 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
1119 |
{ |
1120 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
1121 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
1122 |
#else
|
1123 |
TCGv t0, t1; |
1124 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1125 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1126 |
|
1127 |
tcg_gen_shri_i32(t0, arg, 8);
|
1128 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
1129 |
tcg_gen_shli_i32(t1, t1, 8);
|
1130 |
tcg_gen_or_i32(ret, t0, t1); |
1131 |
tcg_temp_free(t0); |
1132 |
tcg_temp_free(t1); |
1133 |
#endif
|
1134 |
} |
1135 |
|
1136 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
1137 |
{ |
1138 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
1139 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
1140 |
#else
|
1141 |
TCGv t0, t1; |
1142 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1143 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1144 |
|
1145 |
tcg_gen_shli_i32(t0, arg, 24);
|
1146 |
|
1147 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
1148 |
tcg_gen_shli_i32(t1, t1, 8);
|
1149 |
tcg_gen_or_i32(t0, t0, t1); |
1150 |
|
1151 |
tcg_gen_shri_i32(t1, arg, 8);
|
1152 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
1153 |
tcg_gen_or_i32(t0, t0, t1); |
1154 |
|
1155 |
tcg_gen_shri_i32(t1, arg, 24);
|
1156 |
tcg_gen_or_i32(ret, t0, t1); |
1157 |
tcg_temp_free(t0); |
1158 |
tcg_temp_free(t1); |
1159 |
#endif
|
1160 |
} |
1161 |
|
1162 |
#if TCG_TARGET_REG_BITS == 32 |
1163 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1164 |
{ |
1165 |
tcg_gen_ext8s_i32(ret, arg); |
1166 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1167 |
} |
1168 |
|
1169 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1170 |
{ |
1171 |
tcg_gen_ext16s_i32(ret, arg); |
1172 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1173 |
} |
1174 |
|
1175 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1176 |
{ |
1177 |
tcg_gen_mov_i32(ret, arg); |
1178 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1179 |
} |
1180 |
|
1181 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1182 |
{ |
1183 |
tcg_gen_ext8u_i32(ret, arg); |
1184 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1185 |
} |
1186 |
|
1187 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1188 |
{ |
1189 |
tcg_gen_ext16u_i32(ret, arg); |
1190 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1191 |
} |
1192 |
|
1193 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1194 |
{ |
1195 |
tcg_gen_mov_i32(ret, arg); |
1196 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1197 |
} |
1198 |
|
1199 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1200 |
{ |
1201 |
tcg_gen_mov_i32(ret, arg); |
1202 |
} |
1203 |
|
1204 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1205 |
{ |
1206 |
tcg_gen_mov_i32(ret, arg); |
1207 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1208 |
} |
1209 |
|
1210 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1211 |
{ |
1212 |
tcg_gen_mov_i32(ret, arg); |
1213 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1214 |
} |
1215 |
|
1216 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1217 |
{ |
1218 |
TCGv t0, t1; |
1219 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1220 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1221 |
|
1222 |
tcg_gen_bswap_i32(t0, arg); |
1223 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1224 |
tcg_gen_mov_i32(ret, t1); |
1225 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1226 |
tcg_temp_free(t0); |
1227 |
tcg_temp_free(t1); |
1228 |
} |
1229 |
#else
|
1230 |
|
1231 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1232 |
{ |
1233 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1234 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1235 |
#else
|
1236 |
tcg_gen_shli_i64(ret, arg, 56);
|
1237 |
tcg_gen_sari_i64(ret, ret, 56);
|
1238 |
#endif
|
1239 |
} |
1240 |
|
1241 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1242 |
{ |
1243 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1244 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1245 |
#else
|
1246 |
tcg_gen_shli_i64(ret, arg, 48);
|
1247 |
tcg_gen_sari_i64(ret, ret, 48);
|
1248 |
#endif
|
1249 |
} |
1250 |
|
1251 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1252 |
{ |
1253 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1254 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1255 |
#else
|
1256 |
tcg_gen_shli_i64(ret, arg, 32);
|
1257 |
tcg_gen_sari_i64(ret, ret, 32);
|
1258 |
#endif
|
1259 |
} |
1260 |
|
1261 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1262 |
{ |
1263 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
1264 |
} |
1265 |
|
1266 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1267 |
{ |
1268 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
1269 |
} |
1270 |
|
1271 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1272 |
{ |
1273 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1274 |
} |
1275 |
|
1276 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1277 |
registers. This will probably break MIPS64 targets. */
|
1278 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1279 |
{ |
1280 |
tcg_gen_mov_i32(ret, arg); |
1281 |
} |
1282 |
|
1283 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1284 |
registers */
|
1285 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1286 |
{ |
1287 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1288 |
} |
1289 |
|
1290 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1291 |
registers */
|
1292 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1293 |
{ |
1294 |
tcg_gen_ext32s_i64(ret, arg); |
1295 |
} |
1296 |
|
1297 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1298 |
{ |
1299 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1300 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1301 |
#else
|
1302 |
TCGv t0, t1; |
1303 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1304 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1305 |
|
1306 |
tcg_gen_shli_i64(t0, arg, 56);
|
1307 |
|
1308 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1309 |
tcg_gen_shli_i64(t1, t1, 40);
|
1310 |
tcg_gen_or_i64(t0, t0, t1); |
1311 |
|
1312 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1313 |
tcg_gen_shli_i64(t1, t1, 24);
|
1314 |
tcg_gen_or_i64(t0, t0, t1); |
1315 |
|
1316 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1317 |
tcg_gen_shli_i64(t1, t1, 8);
|
1318 |
tcg_gen_or_i64(t0, t0, t1); |
1319 |
|
1320 |
tcg_gen_shri_i64(t1, arg, 8);
|
1321 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1322 |
tcg_gen_or_i64(t0, t0, t1); |
1323 |
|
1324 |
tcg_gen_shri_i64(t1, arg, 24);
|
1325 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1326 |
tcg_gen_or_i64(t0, t0, t1); |
1327 |
|
1328 |
tcg_gen_shri_i64(t1, arg, 40);
|
1329 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1330 |
tcg_gen_or_i64(t0, t0, t1); |
1331 |
|
1332 |
tcg_gen_shri_i64(t1, arg, 56);
|
1333 |
tcg_gen_or_i64(ret, t0, t1); |
1334 |
tcg_temp_free(t0); |
1335 |
tcg_temp_free(t1); |
1336 |
#endif
|
1337 |
} |
1338 |
|
1339 |
#endif
|
1340 |
|
1341 |
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1342 |
{ |
1343 |
#ifdef TCG_TARGET_HAS_neg_i32
|
1344 |
tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
1345 |
#else
|
1346 |
TCGv t0 = tcg_const_i32(0);
|
1347 |
tcg_gen_sub_i32(ret, t0, arg); |
1348 |
tcg_temp_free(t0); |
1349 |
#endif
|
1350 |
} |
1351 |
|
1352 |
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
1353 |
{ |
1354 |
#ifdef TCG_TARGET_HAS_neg_i64
|
1355 |
tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
1356 |
#else
|
1357 |
TCGv t0 = tcg_const_i64(0);
|
1358 |
tcg_gen_sub_i64(ret, t0, arg); |
1359 |
tcg_temp_free(t0); |
1360 |
#endif
|
1361 |
} |
1362 |
|
1363 |
static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1364 |
{ |
1365 |
tcg_gen_xori_i32(ret, arg, -1);
|
1366 |
} |
1367 |
|
1368 |
static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) |
1369 |
{ |
1370 |
tcg_gen_xori_i64(ret, arg, -1);
|
1371 |
} |
1372 |
|
1373 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1374 |
{ |
1375 |
tcg_gen_op1(INDEX_op_discard, arg); |
1376 |
} |
1377 |
|
1378 |
#if TCG_TARGET_REG_BITS == 32 |
1379 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1380 |
{ |
1381 |
tcg_gen_discard_i32(arg); |
1382 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1383 |
} |
1384 |
#else
|
1385 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1386 |
{ |
1387 |
tcg_gen_op1(INDEX_op_discard, arg); |
1388 |
} |
1389 |
#endif
|
1390 |
|
1391 |
/***************************************/
|
1392 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
1393 |
{ |
1394 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
1395 |
} |
1396 |
|
1397 |
/***************************************/
|
1398 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1399 |
type. */
|
1400 |
#ifndef TARGET_LONG_BITS
|
1401 |
#error must include QEMU headers
|
1402 |
#endif
|
1403 |
|
1404 |
/* debug info: write the PC of the corresponding QEMU CPU instruction */
|
1405 |
static inline void tcg_gen_debug_insn_start(uint64_t pc) |
1406 |
{ |
1407 |
/* XXX: must really use a 32 bit size for TCGArg in all cases */
|
1408 |
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
|
1409 |
tcg_gen_op2i(INDEX_op_debug_insn_start, |
1410 |
(uint32_t)(pc), (uint32_t)(pc >> 32));
|
1411 |
#else
|
1412 |
tcg_gen_op1i(INDEX_op_debug_insn_start, pc); |
1413 |
#endif
|
1414 |
} |
1415 |
|
1416 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1417 |
{ |
1418 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1419 |
} |
1420 |
|
1421 |
static inline void tcg_gen_goto_tb(int idx) |
1422 |
{ |
1423 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1424 |
} |
1425 |
|
1426 |
#if TCG_TARGET_REG_BITS == 32 |
1427 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1428 |
{ |
1429 |
#if TARGET_LONG_BITS == 32 |
1430 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1431 |
#else
|
1432 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1433 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1434 |
#endif
|
1435 |
} |
1436 |
|
1437 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1438 |
{ |
1439 |
#if TARGET_LONG_BITS == 32 |
1440 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1441 |
#else
|
1442 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1443 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1444 |
#endif
|
1445 |
} |
1446 |
|
1447 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1448 |
{ |
1449 |
#if TARGET_LONG_BITS == 32 |
1450 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1451 |
#else
|
1452 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1453 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1454 |
#endif
|
1455 |
} |
1456 |
|
1457 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1458 |
{ |
1459 |
#if TARGET_LONG_BITS == 32 |
1460 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1461 |
#else
|
1462 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1463 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1464 |
#endif
|
1465 |
} |
1466 |
|
1467 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1468 |
{ |
1469 |
#if TARGET_LONG_BITS == 32 |
1470 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1471 |
#else
|
1472 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1473 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1474 |
#endif
|
1475 |
} |
1476 |
|
1477 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1478 |
{ |
1479 |
#if TARGET_LONG_BITS == 32 |
1480 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1481 |
#else
|
1482 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1483 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1484 |
#endif
|
1485 |
} |
1486 |
|
1487 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1488 |
{ |
1489 |
#if TARGET_LONG_BITS == 32 |
1490 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1491 |
#else
|
1492 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1493 |
addr, TCGV_HIGH(addr), mem_index); |
1494 |
#endif
|
1495 |
} |
1496 |
|
1497 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1498 |
{ |
1499 |
#if TARGET_LONG_BITS == 32 |
1500 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1501 |
#else
|
1502 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1503 |
#endif
|
1504 |
} |
1505 |
|
1506 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1507 |
{ |
1508 |
#if TARGET_LONG_BITS == 32 |
1509 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1510 |
#else
|
1511 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1512 |
#endif
|
1513 |
} |
1514 |
|
1515 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1516 |
{ |
1517 |
#if TARGET_LONG_BITS == 32 |
1518 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1519 |
#else
|
1520 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1521 |
#endif
|
1522 |
} |
1523 |
|
1524 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1525 |
{ |
1526 |
#if TARGET_LONG_BITS == 32 |
1527 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1528 |
#else
|
1529 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1530 |
addr, TCGV_HIGH(addr), mem_index); |
1531 |
#endif
|
1532 |
} |
1533 |
|
1534 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1535 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1536 |
|
1537 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1538 |
|
1539 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1540 |
{ |
1541 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1542 |
} |
1543 |
|
1544 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1545 |
{ |
1546 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1547 |
} |
1548 |
|
1549 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1550 |
{ |
1551 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1552 |
} |
1553 |
|
1554 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1555 |
{ |
1556 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1557 |
} |
1558 |
|
1559 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1560 |
{ |
1561 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1562 |
} |
1563 |
|
1564 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1565 |
{ |
1566 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1567 |
} |
1568 |
|
1569 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1570 |
{ |
1571 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1572 |
} |
1573 |
|
1574 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1575 |
{ |
1576 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1577 |
} |
1578 |
|
1579 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1580 |
{ |
1581 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1582 |
} |
1583 |
|
1584 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1585 |
{ |
1586 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1587 |
} |
1588 |
|
1589 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1590 |
{ |
1591 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1592 |
} |
1593 |
|
1594 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1595 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1596 |
|
1597 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1598 |
|
1599 |
#if TARGET_LONG_BITS == 64 |
1600 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1601 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1602 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1603 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1604 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1605 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1606 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1607 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1608 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1609 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1610 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1611 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1612 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1613 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1614 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1615 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1616 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1617 |
#define tcg_gen_neg_tl tcg_gen_neg_i64
|
1618 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1619 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1620 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1621 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1622 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1623 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1624 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1625 |
#define tcg_gen_not_tl tcg_gen_not_i64
|
1626 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1627 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1628 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1629 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1630 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1631 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1632 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1633 |
#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
|
1634 |
#define tcg_gen_mul_tl tcg_gen_mul_i64
|
1635 |
#define tcg_gen_muli_tl tcg_gen_muli_i64
|
1636 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1637 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
1638 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
1639 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
1640 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
1641 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
1642 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
1643 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
|
1644 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
|
1645 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
|
1646 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
|
1647 |
#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
|
1648 |
#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
|
1649 |
#define tcg_const_tl tcg_const_i64
|
1650 |
#else
|
1651 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1652 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1653 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1654 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1655 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1656 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1657 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1658 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1659 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1660 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1661 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1662 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1663 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1664 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1665 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1666 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1667 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1668 |
#define tcg_gen_neg_tl tcg_gen_neg_i32
|
1669 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1670 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1671 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1672 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1673 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1674 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1675 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1676 |
#define tcg_gen_not_tl tcg_gen_not_i32
|
1677 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1678 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1679 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1680 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1681 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1682 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1683 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1684 |
#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
|
1685 |
#define tcg_gen_mul_tl tcg_gen_mul_i32
|
1686 |
#define tcg_gen_muli_tl tcg_gen_muli_i32
|
1687 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1688 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
1689 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
1690 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
1691 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
1692 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
1693 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
1694 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
|
1695 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
|
1696 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
|
1697 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
|
1698 |
#define tcg_gen_ext32u_tl tcg_gen_mov_i32
|
1699 |
#define tcg_gen_ext32s_tl tcg_gen_mov_i32
|
1700 |
#define tcg_const_tl tcg_const_i32
|
1701 |
#endif
|
1702 |
|
1703 |
#if TCG_TARGET_REG_BITS == 32 |
1704 |
#define tcg_gen_add_ptr tcg_gen_add_i32
|
1705 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
1706 |
#define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
|
1707 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1708 |
#define tcg_gen_add_ptr tcg_gen_add_i64
|
1709 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
1710 |
#define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
|
1711 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1712 |
|