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/*
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 * gdb server stub
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 *
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 * Copyright (c) 2003-2005 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "config.h"
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "qemu.h"
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#else
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#include "vl.h"
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#endif
34

    
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#include "qemu_socket.h"
36
#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5
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#endif
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#ifndef SIGINT
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#define SIGINT 2
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#endif
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#else
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#include <signal.h>
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#endif
47

    
48
//#define DEBUG_GDB
49

    
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enum RSState {
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    RS_IDLE,
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    RS_GETLINE,
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    RS_CHKSUM1,
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    RS_CHKSUM2,
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    RS_SYSCALL,
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};
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typedef struct GDBState {
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    CPUState *env; /* current CPU */
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    enum RSState state; /* parsing state */
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    char line_buf[4096];
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    int line_buf_index;
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    int line_csum;
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    char last_packet[4100];
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    int last_packet_len;
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#ifdef CONFIG_USER_ONLY
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    int fd;
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    int running_state;
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#else
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    CharDriverState *chr;
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#endif
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} GDBState;
72

    
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#ifdef CONFIG_USER_ONLY
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/* XXX: This is not thread safe.  Do we care?  */
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static int gdbserver_fd = -1;
76

    
77
/* XXX: remove this hack.  */
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static GDBState gdbserver_state;
79

    
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static int get_char(GDBState *s)
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{
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    uint8_t ch;
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    int ret;
84

    
85
    for(;;) {
86
        ret = recv(s->fd, &ch, 1, 0);
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        if (ret < 0) {
88
            if (errno != EINTR && errno != EAGAIN)
89
                return -1;
90
        } else if (ret == 0) {
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            return -1;
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        } else {
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            break;
94
        }
95
    }
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    return ch;
97
}
98
#endif
99

    
100
/* GDB stub state for use by semihosting syscalls.  */
101
static GDBState *gdb_syscall_state;
102
static gdb_syscall_complete_cb gdb_current_syscall_cb;
103

    
104
enum {
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    GDB_SYS_UNKNOWN,
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    GDB_SYS_ENABLED,
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    GDB_SYS_DISABLED,
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} gdb_syscall_mode;
109

    
110
/* If gdb is connected when the first semihosting syscall occurs then use
111
   remote gdb syscalls.  Otherwise use native file IO.  */
112
int use_gdb_syscalls(void)
113
{
114
    if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
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        gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116
                                              : GDB_SYS_DISABLED);
117
    }
118
    return gdb_syscall_mode == GDB_SYS_ENABLED;
119
}
120

    
121
static void put_buffer(GDBState *s, const uint8_t *buf, int len)
122
{
123
#ifdef CONFIG_USER_ONLY
124
    int ret;
125

    
126
    while (len > 0) {
127
        ret = send(s->fd, buf, len, 0);
128
        if (ret < 0) {
129
            if (errno != EINTR && errno != EAGAIN)
130
                return;
131
        } else {
132
            buf += ret;
133
            len -= ret;
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        }
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    }
136
#else
137
    qemu_chr_write(s->chr, buf, len);
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#endif
139
}
140

    
141
static inline int fromhex(int v)
142
{
143
    if (v >= '0' && v <= '9')
144
        return v - '0';
145
    else if (v >= 'A' && v <= 'F')
146
        return v - 'A' + 10;
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    else if (v >= 'a' && v <= 'f')
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        return v - 'a' + 10;
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    else
150
        return 0;
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}
152

    
153
static inline int tohex(int v)
154
{
155
    if (v < 10)
156
        return v + '0';
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    else
158
        return v - 10 + 'a';
159
}
160

    
161
static void memtohex(char *buf, const uint8_t *mem, int len)
162
{
163
    int i, c;
164
    char *q;
165
    q = buf;
166
    for(i = 0; i < len; i++) {
167
        c = mem[i];
168
        *q++ = tohex(c >> 4);
169
        *q++ = tohex(c & 0xf);
170
    }
171
    *q = '\0';
172
}
173

    
174
static void hextomem(uint8_t *mem, const char *buf, int len)
175
{
176
    int i;
177

    
178
    for(i = 0; i < len; i++) {
179
        mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180
        buf += 2;
181
    }
182
}
183

    
184
/* return -1 if error, 0 if OK */
185
static int put_packet(GDBState *s, char *buf)
186
{
187
    int len, csum, i;
188
    char *p;
189

    
190
#ifdef DEBUG_GDB
191
    printf("reply='%s'\n", buf);
192
#endif
193

    
194
    for(;;) {
195
        p = s->last_packet;
196
        *(p++) = '$';
197
        len = strlen(buf);
198
        memcpy(p, buf, len);
199
        p += len;
200
        csum = 0;
201
        for(i = 0; i < len; i++) {
202
            csum += buf[i];
203
        }
204
        *(p++) = '#';
205
        *(p++) = tohex((csum >> 4) & 0xf);
206
        *(p++) = tohex((csum) & 0xf);
207

    
208
        s->last_packet_len = p - s->last_packet;
209
        put_buffer(s, s->last_packet, s->last_packet_len);
210

    
211
#ifdef CONFIG_USER_ONLY
212
        i = get_char(s);
213
        if (i < 0)
214
            return -1;
215
        if (i == '+')
216
            break;
217
#else
218
        break;
219
#endif
220
    }
221
    return 0;
222
}
223

    
224
#if defined(TARGET_I386)
225

    
226
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
227
{
228
    int i, fpus;
229
    uint32_t *registers = (uint32_t *)mem_buf;
230

    
231
#ifdef TARGET_X86_64
232
    /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
233
    uint64_t *registers64 = (uint64_t *)mem_buf;
234

    
235
    if (env->hflags & HF_CS64_MASK) {
236
        registers64[0] = tswap64(env->regs[R_EAX]);
237
        registers64[1] = tswap64(env->regs[R_EBX]);
238
        registers64[2] = tswap64(env->regs[R_ECX]);
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        registers64[3] = tswap64(env->regs[R_EDX]);
240
        registers64[4] = tswap64(env->regs[R_ESI]);
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        registers64[5] = tswap64(env->regs[R_EDI]);
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        registers64[6] = tswap64(env->regs[R_EBP]);
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        registers64[7] = tswap64(env->regs[R_ESP]);
244
        for(i = 8; i < 16; i++) {
245
            registers64[i] = tswap64(env->regs[i]);
246
        }
247
        registers64[16] = tswap64(env->eip);
248

    
249
        registers = (uint32_t *)&registers64[17];
250
        registers[0] = tswap32(env->eflags);
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        registers[1] = tswap32(env->segs[R_CS].selector);
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        registers[2] = tswap32(env->segs[R_SS].selector);
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        registers[3] = tswap32(env->segs[R_DS].selector);
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        registers[4] = tswap32(env->segs[R_ES].selector);
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        registers[5] = tswap32(env->segs[R_FS].selector);
256
        registers[6] = tswap32(env->segs[R_GS].selector);
257
        /* XXX: convert floats */
258
        for(i = 0; i < 8; i++) {
259
            memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
260
        }
261
        registers[27] = tswap32(env->fpuc); /* fctrl */
262
        fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
263
        registers[28] = tswap32(fpus); /* fstat */
264
        registers[29] = 0; /* ftag */
265
        registers[30] = 0; /* fiseg */
266
        registers[31] = 0; /* fioff */
267
        registers[32] = 0; /* foseg */
268
        registers[33] = 0; /* fooff */
269
        registers[34] = 0; /* fop */
270
        for(i = 0; i < 16; i++) {
271
            memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
272
        }
273
        registers[99] = tswap32(env->mxcsr);
274

    
275
        return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
276
    }
277
#endif
278

    
279
    for(i = 0; i < 8; i++) {
280
        registers[i] = env->regs[i];
281
    }
282
    registers[8] = env->eip;
283
    registers[9] = env->eflags;
284
    registers[10] = env->segs[R_CS].selector;
285
    registers[11] = env->segs[R_SS].selector;
286
    registers[12] = env->segs[R_DS].selector;
287
    registers[13] = env->segs[R_ES].selector;
288
    registers[14] = env->segs[R_FS].selector;
289
    registers[15] = env->segs[R_GS].selector;
290
    /* XXX: convert floats */
291
    for(i = 0; i < 8; i++) {
292
        memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
293
    }
294
    registers[36] = env->fpuc;
295
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
296
    registers[37] = fpus;
297
    registers[38] = 0; /* XXX: convert tags */
298
    registers[39] = 0; /* fiseg */
299
    registers[40] = 0; /* fioff */
300
    registers[41] = 0; /* foseg */
301
    registers[42] = 0; /* fooff */
302
    registers[43] = 0; /* fop */
303

    
304
    for(i = 0; i < 16; i++)
305
        tswapls(&registers[i]);
306
    for(i = 36; i < 44; i++)
307
        tswapls(&registers[i]);
308
    return 44 * 4;
309
}
310

    
311
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
312
{
313
    uint32_t *registers = (uint32_t *)mem_buf;
314
    int i;
315

    
316
    for(i = 0; i < 8; i++) {
317
        env->regs[i] = tswapl(registers[i]);
318
    }
319
    env->eip = tswapl(registers[8]);
320
    env->eflags = tswapl(registers[9]);
321
#if defined(CONFIG_USER_ONLY)
322
#define LOAD_SEG(index, sreg)\
323
            if (tswapl(registers[index]) != env->segs[sreg].selector)\
324
                cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
325
            LOAD_SEG(10, R_CS);
326
            LOAD_SEG(11, R_SS);
327
            LOAD_SEG(12, R_DS);
328
            LOAD_SEG(13, R_ES);
329
            LOAD_SEG(14, R_FS);
330
            LOAD_SEG(15, R_GS);
331
#endif
332
}
333

    
334
#elif defined (TARGET_PPC)
335
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
336
{
337
    uint32_t *registers = (uint32_t *)mem_buf, tmp;
338
    int i;
339

    
340
    /* fill in gprs */
341
    for(i = 0; i < 32; i++) {
342
        registers[i] = tswapl(env->gpr[i]);
343
    }
344
    /* fill in fprs */
345
    for (i = 0; i < 32; i++) {
346
        registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
347
        registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
348
    }
349
    /* nip, msr, ccr, lnk, ctr, xer, mq */
350
    registers[96] = tswapl(env->nip);
351
    registers[97] = tswapl(env->msr);
352
    tmp = 0;
353
    for (i = 0; i < 8; i++)
354
        tmp |= env->crf[i] << (32 - ((i + 1) * 4));
355
    registers[98] = tswapl(tmp);
356
    registers[99] = tswapl(env->lr);
357
    registers[100] = tswapl(env->ctr);
358
    registers[101] = tswapl(ppc_load_xer(env));
359
    registers[102] = 0;
360

    
361
    return 103 * 4;
362
}
363

    
364
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
365
{
366
    uint32_t *registers = (uint32_t *)mem_buf;
367
    int i;
368

    
369
    /* fill in gprs */
370
    for (i = 0; i < 32; i++) {
371
        env->gpr[i] = tswapl(registers[i]);
372
    }
373
    /* fill in fprs */
374
    for (i = 0; i < 32; i++) {
375
        *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
376
        *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
377
    }
378
    /* nip, msr, ccr, lnk, ctr, xer, mq */
379
    env->nip = tswapl(registers[96]);
380
    ppc_store_msr(env, tswapl(registers[97]));
381
    registers[98] = tswapl(registers[98]);
382
    for (i = 0; i < 8; i++)
383
        env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
384
    env->lr = tswapl(registers[99]);
385
    env->ctr = tswapl(registers[100]);
386
    ppc_store_xer(env, tswapl(registers[101]));
387
}
388
#elif defined (TARGET_SPARC)
389
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
390
{
391
    target_ulong *registers = (target_ulong *)mem_buf;
392
    int i;
393

    
394
    /* fill in g0..g7 */
395
    for(i = 0; i < 8; i++) {
396
        registers[i] = tswapl(env->gregs[i]);
397
    }
398
    /* fill in register window */
399
    for(i = 0; i < 24; i++) {
400
        registers[i + 8] = tswapl(env->regwptr[i]);
401
    }
402
#ifndef TARGET_SPARC64
403
    /* fill in fprs */
404
    for (i = 0; i < 32; i++) {
405
        registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
406
    }
407
    /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
408
    registers[64] = tswapl(env->y);
409
    {
410
        target_ulong tmp;
411

    
412
        tmp = GET_PSR(env);
413
        registers[65] = tswapl(tmp);
414
    }
415
    registers[66] = tswapl(env->wim);
416
    registers[67] = tswapl(env->tbr);
417
    registers[68] = tswapl(env->pc);
418
    registers[69] = tswapl(env->npc);
419
    registers[70] = tswapl(env->fsr);
420
    registers[71] = 0; /* csr */
421
    registers[72] = 0;
422
    return 73 * sizeof(target_ulong);
423
#else
424
    /* fill in fprs */
425
    for (i = 0; i < 64; i += 2) {
426
        uint64_t tmp;
427

    
428
        tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
429
        tmp |= *(uint32_t *)&env->fpr[i + 1];
430
        registers[i / 2 + 32] = tswap64(tmp);
431
    }
432
    registers[64] = tswapl(env->pc);
433
    registers[65] = tswapl(env->npc);
434
    registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
435
                           ((env->asi & 0xff) << 24) |
436
                           ((env->pstate & 0xfff) << 8) |
437
                           GET_CWP64(env));
438
    registers[67] = tswapl(env->fsr);
439
    registers[68] = tswapl(env->fprs);
440
    registers[69] = tswapl(env->y);
441
    return 70 * sizeof(target_ulong);
442
#endif
443
}
444

    
445
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
446
{
447
    target_ulong *registers = (target_ulong *)mem_buf;
448
    int i;
449

    
450
    /* fill in g0..g7 */
451
    for(i = 0; i < 7; i++) {
452
        env->gregs[i] = tswapl(registers[i]);
453
    }
454
    /* fill in register window */
455
    for(i = 0; i < 24; i++) {
456
        env->regwptr[i] = tswapl(registers[i + 8]);
457
    }
458
#ifndef TARGET_SPARC64
459
    /* fill in fprs */
460
    for (i = 0; i < 32; i++) {
461
        *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
462
    }
463
    /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
464
    env->y = tswapl(registers[64]);
465
    PUT_PSR(env, tswapl(registers[65]));
466
    env->wim = tswapl(registers[66]);
467
    env->tbr = tswapl(registers[67]);
468
    env->pc = tswapl(registers[68]);
469
    env->npc = tswapl(registers[69]);
470
    env->fsr = tswapl(registers[70]);
471
#else
472
    for (i = 0; i < 64; i += 2) {
473
        uint64_t tmp;
474

    
475
        tmp = tswap64(registers[i / 2 + 32]);
476
        *((uint32_t *)&env->fpr[i]) = tmp >> 32;
477
        *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
478
    }
479
    env->pc = tswapl(registers[64]);
480
    env->npc = tswapl(registers[65]);
481
    {
482
        uint64_t tmp = tswapl(registers[66]);
483

    
484
        PUT_CCR(env, tmp >> 32);
485
        env->asi = (tmp >> 24) & 0xff;
486
        env->pstate = (tmp >> 8) & 0xfff;
487
        PUT_CWP64(env, tmp & 0xff);
488
    }
489
    env->fsr = tswapl(registers[67]);
490
    env->fprs = tswapl(registers[68]);
491
    env->y = tswapl(registers[69]);
492
#endif
493
}
494
#elif defined (TARGET_ARM)
495
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
496
{
497
    int i;
498
    uint8_t *ptr;
499

    
500
    ptr = mem_buf;
501
    /* 16 core integer registers (4 bytes each).  */
502
    for (i = 0; i < 16; i++)
503
      {
504
        *(uint32_t *)ptr = tswapl(env->regs[i]);
505
        ptr += 4;
506
      }
507
    /* 8 FPA registers (12 bytes each), FPS (4 bytes).
508
       Not yet implemented.  */
509
    memset (ptr, 0, 8 * 12 + 4);
510
    ptr += 8 * 12 + 4;
511
    /* CPSR (4 bytes).  */
512
    *(uint32_t *)ptr = tswapl (cpsr_read(env));
513
    ptr += 4;
514

    
515
    return ptr - mem_buf;
516
}
517

    
518
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
519
{
520
    int i;
521
    uint8_t *ptr;
522

    
523
    ptr = mem_buf;
524
    /* Core integer registers.  */
525
    for (i = 0; i < 16; i++)
526
      {
527
        env->regs[i] = tswapl(*(uint32_t *)ptr);
528
        ptr += 4;
529
      }
530
    /* Ignore FPA regs and scr.  */
531
    ptr += 8 * 12 + 4;
532
    cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
533
}
534
#elif defined (TARGET_M68K)
535
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
536
{
537
    int i;
538
    uint8_t *ptr;
539
    CPU_DoubleU u;
540

    
541
    ptr = mem_buf;
542
    /* D0-D7 */
543
    for (i = 0; i < 8; i++) {
544
        *(uint32_t *)ptr = tswapl(env->dregs[i]);
545
        ptr += 4;
546
    }
547
    /* A0-A7 */
548
    for (i = 0; i < 8; i++) {
549
        *(uint32_t *)ptr = tswapl(env->aregs[i]);
550
        ptr += 4;
551
    }
552
    *(uint32_t *)ptr = tswapl(env->sr);
553
    ptr += 4;
554
    *(uint32_t *)ptr = tswapl(env->pc);
555
    ptr += 4;
556
    /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
557
       ColdFire has 8-bit double precision registers.  */
558
    for (i = 0; i < 8; i++) {
559
        u.d = env->fregs[i];
560
        *(uint32_t *)ptr = tswap32(u.l.upper);
561
        *(uint32_t *)ptr = tswap32(u.l.lower);
562
    }
563
    /* FP control regs (not implemented).  */
564
    memset (ptr, 0, 3 * 4);
565
    ptr += 3 * 4;
566

    
567
    return ptr - mem_buf;
568
}
569

    
570
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
571
{
572
    int i;
573
    uint8_t *ptr;
574
    CPU_DoubleU u;
575

    
576
    ptr = mem_buf;
577
    /* D0-D7 */
578
    for (i = 0; i < 8; i++) {
579
        env->dregs[i] = tswapl(*(uint32_t *)ptr);
580
        ptr += 4;
581
    }
582
    /* A0-A7 */
583
    for (i = 0; i < 8; i++) {
584
        env->aregs[i] = tswapl(*(uint32_t *)ptr);
585
        ptr += 4;
586
    }
587
    env->sr = tswapl(*(uint32_t *)ptr);
588
    ptr += 4;
589
    env->pc = tswapl(*(uint32_t *)ptr);
590
    ptr += 4;
591
    /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
592
       ColdFire has 8-bit double precision registers.  */
593
    for (i = 0; i < 8; i++) {
594
        u.l.upper = tswap32(*(uint32_t *)ptr);
595
        u.l.lower = tswap32(*(uint32_t *)ptr);
596
        env->fregs[i] = u.d;
597
    }
598
    /* FP control regs (not implemented).  */
599
    ptr += 3 * 4;
600
}
601
#elif defined (TARGET_MIPS)
602
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
603
{
604
    int i;
605
    uint8_t *ptr;
606

    
607
    ptr = mem_buf;
608
    for (i = 0; i < 32; i++)
609
      {
610
        *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
611
        ptr += sizeof(target_ulong);
612
      }
613

    
614
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
615
    ptr += sizeof(target_ulong);
616

    
617
    *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
618
    ptr += sizeof(target_ulong);
619

    
620
    *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
621
    ptr += sizeof(target_ulong);
622

    
623
    *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
624
    ptr += sizeof(target_ulong);
625

    
626
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
627
    ptr += sizeof(target_ulong);
628

    
629
    *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
630
    ptr += sizeof(target_ulong);
631

    
632
    if (env->CP0_Config1 & (1 << CP0C1_FP))
633
      {
634
        for (i = 0; i < 32; i++)
635
          {
636
            if (env->CP0_Status & (1 << CP0St_FR))
637
              *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
638
            else
639
              *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
640
            ptr += sizeof(target_ulong);
641
          }
642

    
643
        *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
644
        ptr += sizeof(target_ulong);
645

    
646
        *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
647
        ptr += sizeof(target_ulong);
648
      }
649

    
650
    /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
651
    *(target_ulong *)ptr = 0;
652
    ptr += sizeof(target_ulong);
653

    
654
    /* Registers for embedded use, we just pad them. */
655
    for (i = 0; i < 16; i++)
656
      {
657
        *(target_ulong *)ptr = 0;
658
        ptr += sizeof(target_ulong);
659
      }
660

    
661
    /* Processor ID. */
662
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
663
    ptr += sizeof(target_ulong);
664

    
665
    return ptr - mem_buf;
666
}
667

    
668
/* convert MIPS rounding mode in FCR31 to IEEE library */
669
static unsigned int ieee_rm[] =
670
  {
671
    float_round_nearest_even,
672
    float_round_to_zero,
673
    float_round_up,
674
    float_round_down
675
  };
676
#define RESTORE_ROUNDING_MODE \
677
    set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
678

    
679
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
680
{
681
    int i;
682
    uint8_t *ptr;
683

    
684
    ptr = mem_buf;
685
    for (i = 0; i < 32; i++)
686
      {
687
        env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
688
        ptr += sizeof(target_ulong);
689
      }
690

    
691
    env->CP0_Status = tswapl(*(target_ulong *)ptr);
692
    ptr += sizeof(target_ulong);
693

    
694
    env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
695
    ptr += sizeof(target_ulong);
696

    
697
    env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
698
    ptr += sizeof(target_ulong);
699

    
700
    env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
701
    ptr += sizeof(target_ulong);
702

    
703
    env->CP0_Cause = tswapl(*(target_ulong *)ptr);
704
    ptr += sizeof(target_ulong);
705

    
706
    env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
707
    ptr += sizeof(target_ulong);
708

    
709
    if (env->CP0_Config1 & (1 << CP0C1_FP))
710
      {
711
        for (i = 0; i < 32; i++)
712
          {
713
            if (env->CP0_Status & (1 << CP0St_FR))
714
              env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
715
            else
716
              env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
717
            ptr += sizeof(target_ulong);
718
          }
719

    
720
        env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
721
        ptr += sizeof(target_ulong);
722

    
723
        /* The remaining registers are assumed to be read-only. */
724

    
725
        /* set rounding mode */
726
        RESTORE_ROUNDING_MODE;
727

    
728
#ifndef CONFIG_SOFTFLOAT
729
        /* no floating point exception for native float */
730
        SET_FP_ENABLE(env->fcr31, 0);
731
#endif
732
      }
733
}
734
#elif defined (TARGET_SH4)
735

    
736
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
737

    
738
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
739
{
740
  uint32_t *ptr = (uint32_t *)mem_buf;
741
  int i;
742

    
743
#define SAVE(x) *ptr++=tswapl(x)
744
  if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
745
      for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
746
  } else {
747
      for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
748
  }
749
  for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
750
  SAVE (env->pc);
751
  SAVE (env->pr);
752
  SAVE (env->gbr);
753
  SAVE (env->vbr);
754
  SAVE (env->mach);
755
  SAVE (env->macl);
756
  SAVE (env->sr);
757
  SAVE (env->fpul);
758
  SAVE (env->fpscr);
759
  for (i = 0; i < 16; i++)
760
      SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
761
  SAVE (env->ssr);
762
  SAVE (env->spc);
763
  for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
764
  for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
765
  return ((uint8_t *)ptr - mem_buf);
766
}
767

    
768
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
769
{
770
  uint32_t *ptr = (uint32_t *)mem_buf;
771
  int i;
772

    
773
#define LOAD(x) (x)=*ptr++;
774
  if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
775
      for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
776
  } else {
777
      for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
778
  }
779
  for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
780
  LOAD (env->pc);
781
  LOAD (env->pr);
782
  LOAD (env->gbr);
783
  LOAD (env->vbr);
784
  LOAD (env->mach);
785
  LOAD (env->macl);
786
  LOAD (env->sr);
787
  LOAD (env->fpul);
788
  LOAD (env->fpscr);
789
  for (i = 0; i < 16; i++)
790
      LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
791
  LOAD (env->ssr);
792
  LOAD (env->spc);
793
  for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
794
  for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
795
}
796
#elif defined (TARGET_CRIS)
797

    
798
static int cris_save_32 (unsigned char *d, uint32_t value)
799
{
800
        *d++ = (value);
801
        *d++ = (value >>= 8);
802
        *d++ = (value >>= 8);
803
        *d++ = (value >>= 8);
804
        return 4;
805
}
806
static int cris_save_16 (unsigned char *d, uint32_t value)
807
{
808
        *d++ = (value);
809
        *d++ = (value >>= 8);
810
        return 2;
811
}
812
static int cris_save_8 (unsigned char *d, uint32_t value)
813
{
814
        *d++ = (value);
815
        return 1;
816
}
817

    
818
/* FIXME: this will bug on archs not supporting unaligned word accesses.  */
819
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
820
{
821
  uint8_t *ptr = mem_buf;
822
  uint8_t srs;
823
  int i;
824

    
825
  for (i = 0; i < 16; i++)
826
          ptr += cris_save_32 (ptr, env->regs[i]);
827

    
828
  srs = env->pregs[SR_SRS];
829

    
830
  ptr += cris_save_8 (ptr, env->pregs[0]);
831
  ptr += cris_save_8 (ptr, env->pregs[1]);
832
  ptr += cris_save_32 (ptr, env->pregs[2]);
833
  ptr += cris_save_8 (ptr, srs);
834
  ptr += cris_save_16 (ptr, env->pregs[4]);
835

    
836
  for (i = 5; i < 16; i++)
837
          ptr += cris_save_32 (ptr, env->pregs[i]);
838

    
839
  ptr += cris_save_32 (ptr, env->pc);
840

    
841
  for (i = 0; i < 16; i++)
842
          ptr += cris_save_32 (ptr, env->sregs[srs][i]);
843

    
844
  return ((uint8_t *)ptr - mem_buf);
845
}
846

    
847
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
848
{
849
  uint32_t *ptr = (uint32_t *)mem_buf;
850
  int i;
851

    
852
#define LOAD(x) (x)=*ptr++;
853
  for (i = 0; i < 16; i++) LOAD(env->regs[i]);
854
  LOAD (env->pc);
855
}
856
#else
857
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
858
{
859
    return 0;
860
}
861

    
862
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
863
{
864
}
865

    
866
#endif
867

    
868
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
869
{
870
    const char *p;
871
    int ch, reg_size, type;
872
    char buf[4096];
873
    uint8_t mem_buf[4096];
874
    uint32_t *registers;
875
    target_ulong addr, len;
876

    
877
#ifdef DEBUG_GDB
878
    printf("command='%s'\n", line_buf);
879
#endif
880
    p = line_buf;
881
    ch = *p++;
882
    switch(ch) {
883
    case '?':
884
        /* TODO: Make this return the correct value for user-mode.  */
885
        snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
886
        put_packet(s, buf);
887
        break;
888
    case 'c':
889
        if (*p != '\0') {
890
            addr = strtoull(p, (char **)&p, 16);
891
#if defined(TARGET_I386)
892
            env->eip = addr;
893
#elif defined (TARGET_PPC)
894
            env->nip = addr;
895
#elif defined (TARGET_SPARC)
896
            env->pc = addr;
897
            env->npc = addr + 4;
898
#elif defined (TARGET_ARM)
899
            env->regs[15] = addr;
900
#elif defined (TARGET_SH4)
901
            env->pc = addr;
902
#elif defined (TARGET_MIPS)
903
            env->PC[env->current_tc] = addr;
904
#elif defined (TARGET_CRIS)
905
            env->pc = addr;
906
#endif
907
        }
908
#ifdef CONFIG_USER_ONLY
909
        s->running_state = 1;
910
#else
911
        vm_start();
912
#endif
913
        return RS_IDLE;
914
    case 's':
915
        if (*p != '\0') {
916
            addr = strtoull(p, (char **)&p, 16);
917
#if defined(TARGET_I386)
918
            env->eip = addr;
919
#elif defined (TARGET_PPC)
920
            env->nip = addr;
921
#elif defined (TARGET_SPARC)
922
            env->pc = addr;
923
            env->npc = addr + 4;
924
#elif defined (TARGET_ARM)
925
            env->regs[15] = addr;
926
#elif defined (TARGET_SH4)
927
            env->pc = addr;
928
#elif defined (TARGET_MIPS)
929
            env->PC[env->current_tc] = addr;
930
#elif defined (TARGET_CRIS)
931
            env->pc = addr;
932
#endif
933
        }
934
        cpu_single_step(env, 1);
935
#ifdef CONFIG_USER_ONLY
936
        s->running_state = 1;
937
#else
938
        vm_start();
939
#endif
940
        return RS_IDLE;
941
    case 'F':
942
        {
943
            target_ulong ret;
944
            target_ulong err;
945

    
946
            ret = strtoull(p, (char **)&p, 16);
947
            if (*p == ',') {
948
                p++;
949
                err = strtoull(p, (char **)&p, 16);
950
            } else {
951
                err = 0;
952
            }
953
            if (*p == ',')
954
                p++;
955
            type = *p;
956
            if (gdb_current_syscall_cb)
957
                gdb_current_syscall_cb(s->env, ret, err);
958
            if (type == 'C') {
959
                put_packet(s, "T02");
960
            } else {
961
#ifdef CONFIG_USER_ONLY
962
                s->running_state = 1;
963
#else
964
                vm_start();
965
#endif
966
            }
967
        }
968
        break;
969
    case 'g':
970
        reg_size = cpu_gdb_read_registers(env, mem_buf);
971
        memtohex(buf, mem_buf, reg_size);
972
        put_packet(s, buf);
973
        break;
974
    case 'G':
975
        registers = (void *)mem_buf;
976
        len = strlen(p) / 2;
977
        hextomem((uint8_t *)registers, p, len);
978
        cpu_gdb_write_registers(env, mem_buf, len);
979
        put_packet(s, "OK");
980
        break;
981
    case 'm':
982
        addr = strtoull(p, (char **)&p, 16);
983
        if (*p == ',')
984
            p++;
985
        len = strtoull(p, NULL, 16);
986
        if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
987
            put_packet (s, "E14");
988
        } else {
989
            memtohex(buf, mem_buf, len);
990
            put_packet(s, buf);
991
        }
992
        break;
993
    case 'M':
994
        addr = strtoull(p, (char **)&p, 16);
995
        if (*p == ',')
996
            p++;
997
        len = strtoull(p, (char **)&p, 16);
998
        if (*p == ':')
999
            p++;
1000
        hextomem(mem_buf, p, len);
1001
        if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1002
            put_packet(s, "E14");
1003
        else
1004
            put_packet(s, "OK");
1005
        break;
1006
    case 'Z':
1007
        type = strtoul(p, (char **)&p, 16);
1008
        if (*p == ',')
1009
            p++;
1010
        addr = strtoull(p, (char **)&p, 16);
1011
        if (*p == ',')
1012
            p++;
1013
        len = strtoull(p, (char **)&p, 16);
1014
        if (type == 0 || type == 1) {
1015
            if (cpu_breakpoint_insert(env, addr) < 0)
1016
                goto breakpoint_error;
1017
            put_packet(s, "OK");
1018
#ifndef CONFIG_USER_ONLY
1019
        } else if (type == 2) {
1020
            if (cpu_watchpoint_insert(env, addr) < 0)
1021
                goto breakpoint_error;
1022
            put_packet(s, "OK");
1023
#endif
1024
        } else {
1025
        breakpoint_error:
1026
            put_packet(s, "E22");
1027
        }
1028
        break;
1029
    case 'z':
1030
        type = strtoul(p, (char **)&p, 16);
1031
        if (*p == ',')
1032
            p++;
1033
        addr = strtoull(p, (char **)&p, 16);
1034
        if (*p == ',')
1035
            p++;
1036
        len = strtoull(p, (char **)&p, 16);
1037
        if (type == 0 || type == 1) {
1038
            cpu_breakpoint_remove(env, addr);
1039
            put_packet(s, "OK");
1040
#ifndef CONFIG_USER_ONLY
1041
        } else if (type == 2) {
1042
            cpu_watchpoint_remove(env, addr);
1043
            put_packet(s, "OK");
1044
#endif
1045
        } else {
1046
            goto breakpoint_error;
1047
        }
1048
        break;
1049
#ifdef CONFIG_LINUX_USER
1050
    case 'q':
1051
        if (strncmp(p, "Offsets", 7) == 0) {
1052
            TaskState *ts = env->opaque;
1053

    
1054
            sprintf(buf,
1055
                    "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1056
                    ";Bss=" TARGET_ABI_FMT_lx,
1057
                    ts->info->code_offset,
1058
                    ts->info->data_offset,
1059
                    ts->info->data_offset);
1060
            put_packet(s, buf);
1061
            break;
1062
        }
1063
        /* Fall through.  */
1064
#endif
1065
    default:
1066
        //        unknown_command:
1067
        /* put empty packet */
1068
        buf[0] = '\0';
1069
        put_packet(s, buf);
1070
        break;
1071
    }
1072
    return RS_IDLE;
1073
}
1074

    
1075
extern void tb_flush(CPUState *env);
1076

    
1077
#ifndef CONFIG_USER_ONLY
1078
static void gdb_vm_stopped(void *opaque, int reason)
1079
{
1080
    GDBState *s = opaque;
1081
    char buf[256];
1082
    int ret;
1083

    
1084
    if (s->state == RS_SYSCALL)
1085
        return;
1086

    
1087
    /* disable single step if it was enable */
1088
    cpu_single_step(s->env, 0);
1089

    
1090
    if (reason == EXCP_DEBUG) {
1091
        if (s->env->watchpoint_hit) {
1092
            snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1093
                     SIGTRAP,
1094
                     s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1095
            put_packet(s, buf);
1096
            s->env->watchpoint_hit = 0;
1097
            return;
1098
        }
1099
        tb_flush(s->env);
1100
        ret = SIGTRAP;
1101
    } else if (reason == EXCP_INTERRUPT) {
1102
        ret = SIGINT;
1103
    } else {
1104
        ret = 0;
1105
    }
1106
    snprintf(buf, sizeof(buf), "S%02x", ret);
1107
    put_packet(s, buf);
1108
}
1109
#endif
1110

    
1111
/* Send a gdb syscall request.
1112
   This accepts limited printf-style format specifiers, specifically:
1113
    %x  - target_ulong argument printed in hex.
1114
    %lx - 64-bit argument printed in hex.
1115
    %s  - string pointer (target_ulong) and length (int) pair.  */
1116
void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1117
{
1118
    va_list va;
1119
    char buf[256];
1120
    char *p;
1121
    target_ulong addr;
1122
    uint64_t i64;
1123
    GDBState *s;
1124

    
1125
    s = gdb_syscall_state;
1126
    if (!s)
1127
        return;
1128
    gdb_current_syscall_cb = cb;
1129
    s->state = RS_SYSCALL;
1130
#ifndef CONFIG_USER_ONLY
1131
    vm_stop(EXCP_DEBUG);
1132
#endif
1133
    s->state = RS_IDLE;
1134
    va_start(va, fmt);
1135
    p = buf;
1136
    *(p++) = 'F';
1137
    while (*fmt) {
1138
        if (*fmt == '%') {
1139
            fmt++;
1140
            switch (*fmt++) {
1141
            case 'x':
1142
                addr = va_arg(va, target_ulong);
1143
                p += sprintf(p, TARGET_FMT_lx, addr);
1144
                break;
1145
            case 'l':
1146
                if (*(fmt++) != 'x')
1147
                    goto bad_format;
1148
                i64 = va_arg(va, uint64_t);
1149
                p += sprintf(p, "%" PRIx64, i64);
1150
                break;
1151
            case 's':
1152
                addr = va_arg(va, target_ulong);
1153
                p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1154
                break;
1155
            default:
1156
            bad_format:
1157
                fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1158
                        fmt - 1);
1159
                break;
1160
            }
1161
        } else {
1162
            *(p++) = *(fmt++);
1163
        }
1164
    }
1165
    *p = 0;
1166
    va_end(va);
1167
    put_packet(s, buf);
1168
#ifdef CONFIG_USER_ONLY
1169
    gdb_handlesig(s->env, 0);
1170
#else
1171
    cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1172
#endif
1173
}
1174

    
1175
static void gdb_read_byte(GDBState *s, int ch)
1176
{
1177
    CPUState *env = s->env;
1178
    int i, csum;
1179
    char reply[1];
1180

    
1181
#ifndef CONFIG_USER_ONLY
1182
    if (s->last_packet_len) {
1183
        /* Waiting for a response to the last packet.  If we see the start
1184
           of a new command then abandon the previous response.  */
1185
        if (ch == '-') {
1186
#ifdef DEBUG_GDB
1187
            printf("Got NACK, retransmitting\n");
1188
#endif
1189
            put_buffer(s, s->last_packet, s->last_packet_len);
1190
        }
1191
#ifdef DEBUG_GDB
1192
        else if (ch == '+')
1193
            printf("Got ACK\n");
1194
        else
1195
            printf("Got '%c' when expecting ACK/NACK\n", ch);
1196
#endif
1197
        if (ch == '+' || ch == '$')
1198
            s->last_packet_len = 0;
1199
        if (ch != '$')
1200
            return;
1201
    }
1202
    if (vm_running) {
1203
        /* when the CPU is running, we cannot do anything except stop
1204
           it when receiving a char */
1205
        vm_stop(EXCP_INTERRUPT);
1206
    } else
1207
#endif
1208
    {
1209
        switch(s->state) {
1210
        case RS_IDLE:
1211
            if (ch == '$') {
1212
                s->line_buf_index = 0;
1213
                s->state = RS_GETLINE;
1214
            }
1215
            break;
1216
        case RS_GETLINE:
1217
            if (ch == '#') {
1218
            s->state = RS_CHKSUM1;
1219
            } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1220
                s->state = RS_IDLE;
1221
            } else {
1222
            s->line_buf[s->line_buf_index++] = ch;
1223
            }
1224
            break;
1225
        case RS_CHKSUM1:
1226
            s->line_buf[s->line_buf_index] = '\0';
1227
            s->line_csum = fromhex(ch) << 4;
1228
            s->state = RS_CHKSUM2;
1229
            break;
1230
        case RS_CHKSUM2:
1231
            s->line_csum |= fromhex(ch);
1232
            csum = 0;
1233
            for(i = 0; i < s->line_buf_index; i++) {
1234
                csum += s->line_buf[i];
1235
            }
1236
            if (s->line_csum != (csum & 0xff)) {
1237
                reply[0] = '-';
1238
                put_buffer(s, reply, 1);
1239
                s->state = RS_IDLE;
1240
            } else {
1241
                reply[0] = '+';
1242
                put_buffer(s, reply, 1);
1243
                s->state = gdb_handle_packet(s, env, s->line_buf);
1244
            }
1245
            break;
1246
        default:
1247
            abort();
1248
        }
1249
    }
1250
}
1251

    
1252
#ifdef CONFIG_USER_ONLY
1253
int
1254
gdb_handlesig (CPUState *env, int sig)
1255
{
1256
  GDBState *s;
1257
  char buf[256];
1258
  int n;
1259

    
1260
  if (gdbserver_fd < 0)
1261
    return sig;
1262

    
1263
  s = &gdbserver_state;
1264

    
1265
  /* disable single step if it was enabled */
1266
  cpu_single_step(env, 0);
1267
  tb_flush(env);
1268

    
1269
  if (sig != 0)
1270
    {
1271
      snprintf(buf, sizeof(buf), "S%02x", sig);
1272
      put_packet(s, buf);
1273
    }
1274

    
1275
  sig = 0;
1276
  s->state = RS_IDLE;
1277
  s->running_state = 0;
1278
  while (s->running_state == 0) {
1279
      n = read (s->fd, buf, 256);
1280
      if (n > 0)
1281
        {
1282
          int i;
1283

    
1284
          for (i = 0; i < n; i++)
1285
            gdb_read_byte (s, buf[i]);
1286
        }
1287
      else if (n == 0 || errno != EAGAIN)
1288
        {
1289
          /* XXX: Connection closed.  Should probably wait for annother
1290
             connection before continuing.  */
1291
          return sig;
1292
        }
1293
  }
1294
  return sig;
1295
}
1296

    
1297
/* Tell the remote gdb that the process has exited.  */
1298
void gdb_exit(CPUState *env, int code)
1299
{
1300
  GDBState *s;
1301
  char buf[4];
1302

    
1303
  if (gdbserver_fd < 0)
1304
    return;
1305

    
1306
  s = &gdbserver_state;
1307

    
1308
  snprintf(buf, sizeof(buf), "W%02x", code);
1309
  put_packet(s, buf);
1310
}
1311

    
1312

    
1313
static void gdb_accept(void *opaque)
1314
{
1315
    GDBState *s;
1316
    struct sockaddr_in sockaddr;
1317
    socklen_t len;
1318
    int val, fd;
1319

    
1320
    for(;;) {
1321
        len = sizeof(sockaddr);
1322
        fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1323
        if (fd < 0 && errno != EINTR) {
1324
            perror("accept");
1325
            return;
1326
        } else if (fd >= 0) {
1327
            break;
1328
        }
1329
    }
1330

    
1331
    /* set short latency */
1332
    val = 1;
1333
    setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1334

    
1335
    s = &gdbserver_state;
1336
    memset (s, 0, sizeof (GDBState));
1337
    s->env = first_cpu; /* XXX: allow to change CPU */
1338
    s->fd = fd;
1339

    
1340
    gdb_syscall_state = s;
1341

    
1342
    fcntl(fd, F_SETFL, O_NONBLOCK);
1343
}
1344

    
1345
static int gdbserver_open(int port)
1346
{
1347
    struct sockaddr_in sockaddr;
1348
    int fd, val, ret;
1349

    
1350
    fd = socket(PF_INET, SOCK_STREAM, 0);
1351
    if (fd < 0) {
1352
        perror("socket");
1353
        return -1;
1354
    }
1355

    
1356
    /* allow fast reuse */
1357
    val = 1;
1358
    setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1359

    
1360
    sockaddr.sin_family = AF_INET;
1361
    sockaddr.sin_port = htons(port);
1362
    sockaddr.sin_addr.s_addr = 0;
1363
    ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1364
    if (ret < 0) {
1365
        perror("bind");
1366
        return -1;
1367
    }
1368
    ret = listen(fd, 0);
1369
    if (ret < 0) {
1370
        perror("listen");
1371
        return -1;
1372
    }
1373
    return fd;
1374
}
1375

    
1376
int gdbserver_start(int port)
1377
{
1378
    gdbserver_fd = gdbserver_open(port);
1379
    if (gdbserver_fd < 0)
1380
        return -1;
1381
    /* accept connections */
1382
    gdb_accept (NULL);
1383
    return 0;
1384
}
1385
#else
1386
static int gdb_chr_can_receive(void *opaque)
1387
{
1388
  return 1;
1389
}
1390

    
1391
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1392
{
1393
    GDBState *s = opaque;
1394
    int i;
1395

    
1396
    for (i = 0; i < size; i++) {
1397
        gdb_read_byte(s, buf[i]);
1398
    }
1399
}
1400

    
1401
static void gdb_chr_event(void *opaque, int event)
1402
{
1403
    switch (event) {
1404
    case CHR_EVENT_RESET:
1405
        vm_stop(EXCP_INTERRUPT);
1406
        gdb_syscall_state = opaque;
1407
        break;
1408
    default:
1409
        break;
1410
    }
1411
}
1412

    
1413
int gdbserver_start(const char *port)
1414
{
1415
    GDBState *s;
1416
    char gdbstub_port_name[128];
1417
    int port_num;
1418
    char *p;
1419
    CharDriverState *chr;
1420

    
1421
    if (!port || !*port)
1422
      return -1;
1423

    
1424
    port_num = strtol(port, &p, 10);
1425
    if (*p == 0) {
1426
        /* A numeric value is interpreted as a port number.  */
1427
        snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1428
                 "tcp::%d,nowait,nodelay,server", port_num);
1429
        port = gdbstub_port_name;
1430
    }
1431

    
1432
    chr = qemu_chr_open(port);
1433
    if (!chr)
1434
        return -1;
1435

    
1436
    s = qemu_mallocz(sizeof(GDBState));
1437
    if (!s) {
1438
        return -1;
1439
    }
1440
    s->env = first_cpu; /* XXX: allow to change CPU */
1441
    s->chr = chr;
1442
    qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1443
                          gdb_chr_event, s);
1444
    qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1445
    return 0;
1446
}
1447
#endif