Revision cd633b10
| b/target-ppc/helper.h | ||
|---|---|---|
| 155 | 155 |
DEF_HELPER_3(vrlb, void, avr, avr, avr) |
| 156 | 156 |
DEF_HELPER_3(vrlh, void, avr, avr, avr) |
| 157 | 157 |
DEF_HELPER_3(vrlw, void, avr, avr, avr) |
| 158 |
DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32) |
|
| 158 | 159 |
|
| 159 | 160 |
DEF_HELPER_1(efscfsi, i32, i32) |
| 160 | 161 |
DEF_HELPER_1(efscfui, i32, i32) |
| b/target-ppc/op_helper.c | ||
|---|---|---|
| 2145 | 2145 |
VSL(w, u32) |
| 2146 | 2146 |
#undef VSL |
| 2147 | 2147 |
|
| 2148 |
void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) |
|
| 2149 |
{
|
|
| 2150 |
int sh = shift & 0xf; |
|
| 2151 |
int i; |
|
| 2152 |
ppc_avr_t result; |
|
| 2153 |
|
|
| 2154 |
#if defined(WORDS_BIGENDIAN) |
|
| 2155 |
for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
|
|
| 2156 |
int index = sh + i; |
|
| 2157 |
if (index > 0xf) {
|
|
| 2158 |
result.u8[i] = b->u8[index-0x10]; |
|
| 2159 |
} else {
|
|
| 2160 |
result.u8[i] = a->u8[index]; |
|
| 2161 |
} |
|
| 2162 |
} |
|
| 2163 |
#else |
|
| 2164 |
for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
|
|
| 2165 |
int index = (16 - sh) + i; |
|
| 2166 |
if (index > 0xf) {
|
|
| 2167 |
result.u8[i] = a->u8[index-0x10]; |
|
| 2168 |
} else {
|
|
| 2169 |
result.u8[i] = b->u8[index]; |
|
| 2170 |
} |
|
| 2171 |
} |
|
| 2172 |
#endif |
|
| 2173 |
*r = result; |
|
| 2174 |
} |
|
| 2175 |
|
|
| 2148 | 2176 |
void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) |
| 2149 | 2177 |
{
|
| 2150 | 2178 |
int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; |
| b/target-ppc/translate.c | ||
|---|---|---|
| 374 | 374 |
EXTRACT_HELPER(NB, 11, 5); |
| 375 | 375 |
/* Shift count */ |
| 376 | 376 |
EXTRACT_HELPER(SH, 11, 5); |
| 377 |
/* Vector shift count */ |
|
| 378 |
EXTRACT_HELPER(VSH, 6, 4); |
|
| 377 | 379 |
/* Mask start */ |
| 378 | 380 |
EXTRACT_HELPER(MB, 6, 5); |
| 379 | 381 |
/* Mask end */ |
| ... | ... | |
| 6268 | 6270 |
GEN_VXFORM(vrlh, 2, 1); |
| 6269 | 6271 |
GEN_VXFORM(vrlw, 2, 2); |
| 6270 | 6272 |
|
| 6273 |
GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) |
|
| 6274 |
{
|
|
| 6275 |
TCGv_ptr ra, rb, rd; |
|
| 6276 |
TCGv sh; |
|
| 6277 |
if (unlikely(!ctx->altivec_enabled)) {
|
|
| 6278 |
gen_exception(ctx, POWERPC_EXCP_VPU); |
|
| 6279 |
return; |
|
| 6280 |
} |
|
| 6281 |
ra = gen_avr_ptr(rA(ctx->opcode)); |
|
| 6282 |
rb = gen_avr_ptr(rB(ctx->opcode)); |
|
| 6283 |
rd = gen_avr_ptr(rD(ctx->opcode)); |
|
| 6284 |
sh = tcg_const_i32(VSH(ctx->opcode)); |
|
| 6285 |
gen_helper_vsldoi (rd, ra, rb, sh); |
|
| 6286 |
tcg_temp_free_ptr(ra); |
|
| 6287 |
tcg_temp_free_ptr(rb); |
|
| 6288 |
tcg_temp_free_ptr(rd); |
|
| 6289 |
tcg_temp_free(sh); |
|
| 6290 |
} |
|
| 6291 |
|
|
| 6271 | 6292 |
/*** SPE extension ***/ |
| 6272 | 6293 |
/* Register moves */ |
| 6273 | 6294 |
|
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