| 1189 |
1189 |
#endif
|
| 1190 |
1190 |
}
|
| 1191 |
1191 |
|
| 1192 |
|
/* These are currently just for convenience.
|
| 1193 |
|
We assume a target will recognise these automatically . */
|
| 1194 |
1192 |
static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
|
| 1195 |
1193 |
{
|
|
1194 |
#ifdef TCG_TARGET_HAS_ext8u_i32
|
|
1195 |
tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg);
|
|
1196 |
#else
|
| 1196 |
1197 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
|
1198 |
#endif
|
| 1197 |
1199 |
}
|
| 1198 |
1200 |
|
| 1199 |
1201 |
static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
|
| 1200 |
1202 |
{
|
|
1203 |
#ifdef TCG_TARGET_HAS_ext16u_i32
|
|
1204 |
tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg);
|
|
1205 |
#else
|
| 1201 |
1206 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
|
1207 |
#endif
|
| 1202 |
1208 |
}
|
| 1203 |
1209 |
|
| 1204 |
1210 |
/* Note: we assume the two high bytes are set to zero */
|
| ... | ... | |
| 1358 |
1364 |
|
| 1359 |
1365 |
static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
|
| 1360 |
1366 |
{
|
|
1367 |
#ifdef TCG_TARGET_HAS_ext8u_i64
|
|
1368 |
tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg);
|
|
1369 |
#else
|
| 1361 |
1370 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
|
1371 |
#endif
|
| 1362 |
1372 |
}
|
| 1363 |
1373 |
|
| 1364 |
1374 |
static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
|
| 1365 |
1375 |
{
|
|
1376 |
#ifdef TCG_TARGET_HAS_ext16u_i64
|
|
1377 |
tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg);
|
|
1378 |
#else
|
| 1366 |
1379 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
|
1380 |
#endif
|
| 1367 |
1381 |
}
|
| 1368 |
1382 |
|
| 1369 |
1383 |
static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
|
| 1370 |
1384 |
{
|
|
1385 |
#ifdef TCG_TARGET_HAS_ext32u_i64
|
|
1386 |
tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg);
|
|
1387 |
#else
|
| 1371 |
1388 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
|
1389 |
#endif
|
| 1372 |
1390 |
}
|
| 1373 |
1391 |
|
| 1374 |
1392 |
/* Note: we assume the target supports move between 32 and 64 bit
|
| ... | ... | |
| 1382 |
1400 |
registers */
|
| 1383 |
1401 |
static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
|
| 1384 |
1402 |
{
|
| 1385 |
|
tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu);
|
|
1403 |
tcg_gen_ext32u_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
|
| 1386 |
1404 |
}
|
| 1387 |
1405 |
|
| 1388 |
1406 |
/* Note: we assume the target supports move between 32 and 64 bit
|