Revision cfdcd37a
| b/target-ppc/op.c | ||
|---|---|---|
| 233 | 233 |
RETURN(); |
| 234 | 234 |
} |
| 235 | 235 |
|
| 236 |
void OPPROTO op_load_lr (void) |
|
| 237 |
{
|
|
| 238 |
T0 = env->lr; |
|
| 239 |
RETURN(); |
|
| 240 |
} |
|
| 241 |
|
|
| 242 |
void OPPROTO op_store_lr (void) |
|
| 243 |
{
|
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env->lr = T0; |
|
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RETURN(); |
|
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} |
|
| 247 |
|
|
| 248 |
void OPPROTO op_load_ctr (void) |
|
| 249 |
{
|
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T0 = env->ctr; |
|
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RETURN(); |
|
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} |
|
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|
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| 254 |
void OPPROTO op_store_ctr (void) |
|
| 255 |
{
|
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env->ctr = T0; |
|
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RETURN(); |
|
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} |
|
| 259 |
|
|
| 260 | 236 |
void OPPROTO op_load_tbl (void) |
| 261 | 237 |
{
|
| 262 | 238 |
T0 = cpu_ppc_load_tbl(env); |
| b/target-ppc/translate.c | ||
|---|---|---|
| 61 | 61 |
static TCGv cpu_avrh[32], cpu_avrl[32]; |
| 62 | 62 |
static TCGv cpu_crf[8]; |
| 63 | 63 |
static TCGv cpu_nip; |
| 64 |
static TCGv cpu_ctr; |
|
| 65 |
static TCGv cpu_lr; |
|
| 64 | 66 |
|
| 65 | 67 |
/* dyngen register indexes */ |
| 66 | 68 |
static TCGv cpu_T[3]; |
| ... | ... | |
| 168 | 170 |
cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, |
| 169 | 171 |
offsetof(CPUState, nip), "nip"); |
| 170 | 172 |
|
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cpu_ctr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, |
|
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offsetof(CPUState, ctr), "ctr"); |
|
| 175 |
|
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cpu_lr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, |
|
| 177 |
offsetof(CPUState, lr), "lr"); |
|
| 178 |
|
|
| 171 | 179 |
/* register helpers */ |
| 172 | 180 |
#undef DEF_HELPER |
| 173 | 181 |
#define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name); |
| b/target-ppc/translate_init.c | ||
|---|---|---|
| 110 | 110 |
/* LR */ |
| 111 | 111 |
static void spr_read_lr (void *opaque, int sprn) |
| 112 | 112 |
{
|
| 113 |
gen_op_load_lr();
|
|
| 113 |
tcg_gen_mov_tl(cpu_T[0], cpu_lr);
|
|
| 114 | 114 |
} |
| 115 | 115 |
|
| 116 | 116 |
static void spr_write_lr (void *opaque, int sprn) |
| 117 | 117 |
{
|
| 118 |
gen_op_store_lr();
|
|
| 118 |
tcg_gen_mov_tl(cpu_lr, cpu_T[0]);
|
|
| 119 | 119 |
} |
| 120 | 120 |
|
| 121 | 121 |
/* CTR */ |
| 122 | 122 |
static void spr_read_ctr (void *opaque, int sprn) |
| 123 | 123 |
{
|
| 124 |
gen_op_load_ctr();
|
|
| 124 |
tcg_gen_mov_tl(cpu_T[0], cpu_ctr);
|
|
| 125 | 125 |
} |
| 126 | 126 |
|
| 127 | 127 |
static void spr_write_ctr (void *opaque, int sprn) |
| 128 | 128 |
{
|
| 129 |
gen_op_store_ctr();
|
|
| 129 |
tcg_gen_mov_tl(cpu_ctr, cpu_T[0]);
|
|
| 130 | 130 |
} |
| 131 | 131 |
|
| 132 | 132 |
/* User read access to SPR */ |
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