Revision d0dfae6e target-ppc/translate_init.c

b/target-ppc/translate_init.c
48 48
#endif
49 49
PPC_IRQ_INIT_FN(405);
50 50
PPC_IRQ_INIT_FN(6xx);
51
PPC_IRQ_INIT_FN(970);
51 52

  
52 53
/* Generic callbacks:
53 54
 * do nothing but store/retrieve spr value
......
2350 2351
    case CPU_PPC_POWER5:  /* Power 5                       */
2351 2352
    case CPU_PPC_POWER5P: /* Power 5+                      */
2352 2353
#endif
2354
        break;
2355

  
2353 2356
    case CPU_PPC_970:     /* PowerPC 970                   */
2354 2357
    case CPU_PPC_970FX10: /* PowerPC 970 FX                */
2355 2358
    case CPU_PPC_970FX20:
......
2358 2361
    case CPU_PPC_970FX31:
2359 2362
    case CPU_PPC_970MP10: /* PowerPC 970 MP                */
2360 2363
    case CPU_PPC_970MP11:
2364
        gen_spr_generic(env);
2365
        gen_spr_ne_601(env);
2366
        /* XXX: not correct */
2367
        gen_low_BATs(env);
2368
        /* Time base */
2369
        gen_tbl(env);
2370
        gen_spr_7xx(env);
2371
        /* Hardware implementation registers */
2372
        /* XXX : not implemented */
2373
        spr_register(env, SPR_HID0, "HID0",
2374
                     SPR_NOACCESS, SPR_NOACCESS,
2375
                     &spr_read_generic, &spr_write_generic,
2376
                     0x00000000);
2377
        /* XXX : not implemented */
2378
        spr_register(env, SPR_HID1, "HID1",
2379
                     SPR_NOACCESS, SPR_NOACCESS,
2380
                     &spr_read_generic, &spr_write_generic,
2381
                     0x00000000);
2382
        /* XXX : not implemented */
2383
        spr_register(env, SPR_750_HID2, "HID2",
2384
                     SPR_NOACCESS, SPR_NOACCESS,
2385
                     &spr_read_generic, &spr_write_generic,
2386
                     0x00000000);
2387
        /* Allocate hardware IRQ controller */
2388
        ppc970_irq_init(env);
2389
        break;
2390

  
2361 2391
#if defined (TODO)
2362 2392
    case CPU_PPC_CELL10:  /* Cell family                   */
2363 2393
    case CPU_PPC_CELL20:
2364 2394
    case CPU_PPC_CELL30:
2365 2395
    case CPU_PPC_CELL31:
2366 2396
#endif
2397
        break;
2398

  
2367 2399
#if defined (TODO)
2368 2400
    case CPU_PPC_RS64:    /* Apache (RS64/A35)             */
2369 2401
    case CPU_PPC_RS64II:  /* NorthStar (RS64-II/A50)       */

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