Archipelago » qemu

//#define DEBUG_BLK_MIGRATION

#ifdef DEBUG_BLK_MIGRATION

    do { printf("blk_migration: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

{

    BlkMigBlock *blk;

            __FUNCTION__, block_mig_state.submitted, block_mig_state.read_done,

            block_mig_state.transferred);

        assert(block_mig_state.read_done >= 0);

    }

            block_mig_state.submitted, block_mig_state.read_done,

            block_mig_state.transferred);

}

static int block_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque)

{

            stage, block_mig_state.submitted, block_mig_state.transferred);

    if (stage < 0) {

// #define DEBUG_VERBOSE

#ifdef DEBUG_CURL

#else

#endif

#define CURL_NUM_STATES 8

static int curl_sock_cb(CURL *curl, curl_socket_t fd, int action,

                        void *s, void *sp)

{

    switch (action) {

        case CURL_POLL_IN:

            qemu_aio_set_fd_handler(fd, curl_multi_do, NULL, NULL, NULL, s);

    size_t realsize = size * nmemb;

    int i;

    if (!s || !s->orig_buf)

        goto read_end;

        inited = 1;

    }

    s->url = file;

    state = curl_init_state(s);

    if (!state)

        s->len = (size_t)d;

    else if(!s->len)

        goto out;

    curl_clean_state(state);

    curl_easy_cleanup(state->curl);

    state->acb[0] = acb;

    snprintf(state->range, 127, "%lld-%lld", (long long)start, (long long)end);

    curl_easy_setopt(state->curl, CURLOPT_RANGE, state->range);

    curl_multi_add_handle(s->multi, state->curl);

    BDRVCURLState *s = bs->opaque;

    int i;

    for (i=0; i<CURL_NUM_STATES; i++) {

        if (s->states[i].in_use)

            curl_clean_state(&s->states[i]);

} QEMUFileBuffered;

#ifdef DEBUG_BUFFERED_FILE

    do { printf("buffered-file: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

    if (size > (s->buffer_capacity - s->buffer_size)) {

        void *tmp;

                s->buffer_capacity, size + 1024);

        s->buffer_capacity += size + 1024;

    size_t offset = 0;

    if (s->has_error) {

        return;

    }

    while (offset < s->buffer_size) {

        ssize_t ret;

        ret = s->put_buffer(s->opaque, s->buffer + offset,

                            s->buffer_size - offset);

        if (ret == -EAGAIN) {

            s->freeze_output = 1;

            break;

        }

        if (ret <= 0) {

            s->has_error = 1;

            break;

        } else {

            offset += ret;

        }

    }

    memmove(s->buffer, s->buffer + offset, s->buffer_size - offset);

    s->buffer_size -= offset;

}

    int offset = 0;

    ssize_t ret;

    if (s->has_error) {

        return -EINVAL;

    }

    s->freeze_output = 0;

    buffered_flush(s);

    while (!s->freeze_output && offset < size) {

        if (s->bytes_xfer > s->xfer_limit) {

            break;

        }

        ret = s->put_buffer(s->opaque, buf + offset, size - offset);

        if (ret == -EAGAIN) {

            s->freeze_output = 1;

            break;

        }

        if (ret <= 0) {

            s->has_error = 1;

            offset = -EINVAL;

            break;

        }

        offset += ret;

        s->bytes_xfer += ret;

    }

    if (offset >= 0) {

        buffered_append(s, buf + offset, size - offset);

        offset = size;

    }

    QEMUFileBuffered *s = opaque;

    int ret;

    while (!s->has_error && s->buffer_size) {

        buffered_flush(s);

//#define DEBUG

#ifdef DEBUG

#else

#endif

#define GT_REGS			(0x1000 >> 2)

    check_reserved_space(&start, &length);

    length = 0x1000;

    /* Map new address */

            length, start, s->ISD_handle);

    s->ISD_start = start;

    s->ISD_length = length;

    case GT_DEV_B3:

    case GT_DEV_BOOT:

        /* Not implemented */

        break;

    /* ECC */

    case GT_DMA2_CUR:

    case GT_DMA3_CUR:

        /* Not implemented */

        break;

    /* DMA Channel Control */

    case GT_DMA2_CTRL:

    case GT_DMA3_CTRL:

        /* Not implemented */

        break;

    /* DMA Arbiter */

    case GT_DMA_ARB:

        /* Not implemented */

        break;

    /* Timer/Counter */

    case GT_TC3:

    case GT_TC_CONTROL:

        /* Not implemented */

        break;

    /* PCI Internal */

        /* not really implemented */

        s->regs[saddr] = ~(~(s->regs[saddr]) | ~(val & 0xfffffffe));

        s->regs[saddr] |= !!(s->regs[saddr] & 0xfffffffe);

        break;

    case GT_INTRMASK:

        s->regs[saddr] = val & 0x3c3ffffe;

        break;

    case GT_PCI0_ICMASK:

        s->regs[saddr] = val & 0x03fffffe;

        break;

    case GT_PCI0_SERR0MASK:

        s->regs[saddr] = val & 0x0000003f;

        break;

    /* Reserved when only PCI_0 is configured. */

        break;

    default:

        break;

    }

}

    /* Interrupts */

    case GT_INTRCAUSE:

        val = s->regs[saddr];

        break;

    case GT_INTRMASK:

        val = s->regs[saddr];

        break;

    case GT_PCI0_ICMASK:

        val = s->regs[saddr];

        break;

    case GT_PCI0_SERR0MASK:

        val = s->regs[saddr];

        break;

    /* Reserved when only PCI_0 is configured. */

    default:

        val = s->regs[saddr];

        break;

    }

//#define HPET_DEBUG

#ifdef HPET_DEBUG

#else

#endif

static HPETState *hpet_statep;

    HPETState *s = (HPETState *)opaque;

    uint64_t cur_tick, index;

    index = addr;

    /*address range of all TN regs*/

    if (index >= 0x100 && index <= 0x3ff) {

            case HPET_TN_ROUTE:

                return timer->fsb >> 32;

            default:

                break;

        }

    } else {

            case HPET_CFG:

                return s->config;

            case HPET_CFG + 4:

                return 0;

            case HPET_COUNTER:

                if (hpet_enabled())

                    cur_tick = hpet_get_ticks();

                else

                    cur_tick = s->hpet_counter;

                return cur_tick;

            case HPET_COUNTER + 4:

                if (hpet_enabled())

                    cur_tick = hpet_get_ticks();

                else

                    cur_tick = s->hpet_counter;

                return cur_tick >> 32;

            case HPET_STATUS:

                return s->isr;

            default:

                break;

        }

    }

    HPETState *s = (HPETState *)opaque;

    uint64_t old_val, new_val, val, index;

    index = addr;

    old_val = hpet_ram_readl(opaque, addr);

    new_val = value;

    /*address range of all TN regs*/

    if (index >= 0x100 && index <= 0x3ff) {

        uint8_t timer_id = (addr - 0x100) / 0x20;

        HPETTimer *timer = &s->timer[timer_id];

        switch ((addr - 0x100) % 0x20) {

            case HPET_TN_CFG:

                val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK);

                timer->config = (timer->config & 0xffffffff00000000ULL) | val;

                if (new_val & HPET_TN_32BIT) {

                break;

            case HPET_TN_CFG + 4: // Interrupt capabilities

                break;

            case HPET_TN_CMP: // comparator register

                if (timer->config & HPET_TN_32BIT)

                    new_val = (uint32_t)new_val;

                if (!timer_is_periodic(timer) ||

                    hpet_set_timer(timer);

                break;

            case HPET_TN_CMP + 4: // comparator register high order

                if (!timer_is_periodic(timer) ||

                           (timer->config & HPET_TN_SETVAL))

                    timer->cmp = (timer->cmp & 0xffffffffULL)

                    hpet_set_timer(timer);

                break;

            case HPET_TN_ROUTE + 4:

                break;

            default:

                break;

        }

        return;

                }

                break;

            case HPET_CFG + 4:

                break;

            case HPET_STATUS:

                /* FIXME: need to handle level-triggered interrupts */

                   printf("qemu: Writing counter while HPET enabled!\n");

               s->hpet_counter = (s->hpet_counter & 0xffffffff00000000ULL)

                                  | value;

                        value, s->hpet_counter);

               break;

            case HPET_COUNTER + 4:

                   printf("qemu: Writing counter while HPET enabled!\n");

               s->hpet_counter = (s->hpet_counter & 0xffffffffULL)

                                  | (((uint64_t)value) << 32);

                        value, s->hpet_counter);

               break;

            default:

               break;

        }

    }

    int i, iomemtype;

    HPETState *s;

    s = qemu_mallocz(sizeof(HPETState));

    hpet_statep = s;

//#define OHCI_TIME_WARP 1

#ifdef DEBUG_OHCI

#else

#endif

/* Number of Downstream Ports on the root hub.  */

        /* send the attach message */

        usb_send_msg(dev, USB_MSG_ATTACH);

    } else {

        /* set connect status */

        if (port->ctrl & OHCI_PORT_CCS) {

            usb_send_msg(dev, USB_MSG_DETACH);

        }

        port->port.dev = NULL;

    }

    if (old_state != port->ctrl)

        usb_cancel_packet(&ohci->usb_packet);

        ohci->async_td = 0;

    }

}

/* Get an array of dwords from main memory */

{

    OHCIState *ohci = opaque;

#ifdef DEBUG_PACKET

#endif

    ohci->async_complete = 1;

    ohci_process_lists(ohci, 1);

#endif

    if (relative_frame_number < 0) {

        return 1;

    } else if (relative_frame_number > frame_count) {

        /* ISO TD expired - retire the TD to the Done Queue and continue with

           the next ISO TD of the same ED */

               frame_count);

        OHCI_SET_BM(iso_td.flags, TD_CC, OHCI_CC_DATAOVERRUN);

        ed->head &= ~OHCI_DPTR_MASK;

    completion = (addr == ohci->async_td);

    if (completion && !ohci->async_complete) {

#ifdef DEBUG_PACKET

#endif

        return 1;

    }

    flag_r = (td.flags & OHCI_TD_R) != 0;

#ifdef DEBUG_PACKET

            addr, len, str, flag_r, td.cbp, td.be);

    if (len > 0 && dir != OHCI_TD_DIR_IN) {

        for (i = 0; i < len; i++)

            printf(" %.2x", ohci->usb_buf[i]);

    }

#endif

    if (completion) {

                   timely manner.

                 */

#ifdef DEBUG_PACKET

#endif

                return 1;

            }

                break;

        }

#ifdef DEBUG_PACKET

#endif

        if (ret == USB_RET_ASYNC) {

            ohci->async_td = addr;

        if (dir == OHCI_TD_DIR_IN) {

            ohci_copy_td(ohci, &td, ohci->usb_buf, ret, 1);

#ifdef DEBUG_PACKET

            for (i = 0; i < ret; i++)

                printf(" %.2x", ohci->usb_buf[i]);

#endif

        } else {

            ret = len;

            ed->head |= OHCI_ED_C;

    } else {

        if (ret >= 0) {

            OHCI_SET_BM(td.flags, TD_CC, OHCI_CC_DATAUNDERRUN);

        } else {

            switch (ret) {

            case USB_RET_NODEV:

                OHCI_SET_BM(td.flags, TD_CC, OHCI_CC_DEVICENOTRESPONDING);

            case USB_RET_NAK:

                return 1;

            case USB_RET_STALL:

                OHCI_SET_BM(td.flags, TD_CC, OHCI_CC_STALL);

                break;

            case USB_RET_BABBLE:

                OHCI_SET_BM(td.flags, TD_CC, OHCI_CC_DATAOVERRUN);

                break;

            default:

        while ((ed.head & OHCI_DPTR_MASK) != ed.tail) {

#ifdef DEBUG_PACKET

                    "h=%u c=%u\n  head=0x%.8x tailp=0x%.8x next=0x%.8x\n", cur,

                    OHCI_BM(ed.flags, ED_FA), OHCI_BM(ed.flags, ED_EN),

                    OHCI_BM(ed.flags, ED_D), (ed.flags & OHCI_ED_S)!= 0,

{

    if ((ohci->ctl & OHCI_CTL_CLE) && (ohci->status & OHCI_STATUS_CLF)) {

        if (ohci->ctrl_cur && ohci->ctrl_cur != ohci->ctrl_head)

                          ohci->ctrl_head, ohci->ctrl_cur);

        if (!ohci_service_ed_list(ohci, ohci->ctrl_head, completion)) {

            ohci->ctrl_cur = 0;

        return 0;

    }

    ohci_sof(ohci);

    val &= OHCI_FMI_FI;

    if (val != ohci->fi) {

            ohci->name, ohci->fi, ohci->fi);

    }

        break;

    case OHCI_USB_SUSPEND:

        ohci_bus_stop(ohci);

        break;

    case OHCI_USB_RESUME:

        break;

    case OHCI_USB_RESET:

        ohci_reset(ohci);

        break;

    }

}

        for (i = 0; i < ohci->num_ports; i++)

            ohci_port_power(ohci, i, 0);

    }

    if (val & OHCI_RHS_LPSC) {

        for (i = 0; i < ohci->num_ports; i++)

            ohci_port_power(ohci, i, 1);

    }

    if (val & OHCI_RHS_DRWE)

    ohci_port_set_if_connected(ohci, portnum, val & OHCI_PORT_PES);

    if (ohci_port_set_if_connected(ohci, portnum, val & OHCI_PORT_PSS))

    if (ohci_port_set_if_connected(ohci, portnum, val & OHCI_PORT_PRS)) {

        usb_send_msg(port->port.dev, USB_MSG_RESET);

        port->ctrl &= ~OHCI_PORT_PRS;

        /* ??? Should this also set OHCI_PORT_PESC.  */

            usb_bit_time = 1;

        }

#endif

                usb_frame_time, usb_bit_time);

    }

#define NB_PORTS 2

#ifdef DEBUG

static const char *pid2str(int pid)

{

}

#else

#endif

#ifdef DEBUG_DUMP_DATA

static void uhci_async_cancel(UHCIState *s, UHCIAsync *async)

{

           async->td, async->token, async->done);

    if (!async->done)

    int i;

    UHCIPort *port;

    pci_conf = s->dev.config;

    UHCIState *s = opaque;

    addr &= 0x1f;

    switch(addr) {

    case 0x00:

        break;

    }

    return val;

}

    UHCIState *s = opaque;

    addr &= 0x1f;

    switch(addr) {

    case 0x08:

{

    int i, ret;

           pid2str(p->pid), p->devaddr, p->devep, p->len);

    if (p->pid == USB_TOKEN_OUT || p->pid == USB_TOKEN_SETUP)

        dump_data(p->data, p->len);

            ret = dev->info->handle_packet(dev, p);

    }

    if (p->pid == USB_TOKEN_IN && ret > 0)

        dump_data(p->data, ret);

        if ((td->ctrl & TD_CTRL_SPD) && len < max_len) {

            *int_mask |= 0x02;

            /* short packet: do not update QH */

            return 1;

        }

    }

    UHCIState *s = opaque;

    UHCIAsync *async = (UHCIAsync *) packet;

    async->done = 1;

    frame_addr = s->fl_base_addr + ((s->frnum & 0x3ff) << 2);

    cpu_physical_memory_read(frame_addr, (uint8_t *)&link, 4);

    le32_to_cpus(&link);

                 * are already done, and async completion handler will re-process 

                 * the frame when something is ready.

                 */

                break;

            }

            le32_to_cpus(&qh.link);

            le32_to_cpus(&qh.el_link);

                    link, qh.link, qh.el_link);

            if (!is_valid(qh.el_link)) {

        le32_to_cpus(&td.token);

        le32_to_cpus(&td.buffer);

                link, td.link, td.ctrl, td.token, curr_qh);

        old_td_ctrl = td.ctrl;

        }

        if (ret == 2 || ret == 1) {

                    link, ret == 2 ? "pend" : "skip",

                    td.link, td.ctrl, td.token, curr_qh);

        /* completed TD */

                link, td.link, td.ctrl, td.token, curr_qh);

        link = td.link;

            if (!depth_first(link)) {

               /* done with this QH */

                       curr_qh, qh.link, qh.el_link);

               curr_qh = 0;

        /* set hchalted bit in status - UHCI11D 2.1.2 */

        s->status |= UHCI_STS_HCHALTED;

        return;

    }

    /* Start new frame */

    s->frnum = (s->frnum + 1) & 0x7ff;

    uhci_async_validate_begin(s);

//#define DEBUG_MIGRATION_EXEC

#ifdef DEBUG_MIGRATION_EXEC

    do { printf("migration-exec: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

static int exec_close(FdMigrationState *s)

{

    if (s->opaque) {

        qemu_fclose(s->opaque);

        s->opaque = NULL;

    f = popen(command, "w");

    if (f == NULL) {

        goto err_after_alloc;

    }

    s->fd = fileno(f);

    if (s->fd == -1) {

        goto err_after_open;

    }

        goto err;

    }

    qemu_announce_self();

    /* we've successfully migrated, close the fd */

    qemu_set_fd_handler2(qemu_stdio_fd(f), NULL, NULL, NULL, NULL);

    if (autostart)

{

    QEMUFile *f;

    f = qemu_popen_cmd(command, "r");

    if(f == NULL) {

        return -errno;

    }

//#define DEBUG_MIGRATION_FD

#ifdef DEBUG_MIGRATION_FD

    do { printf("migration-fd: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

static int fd_close(FdMigrationState *s)

{

    if (s->fd != -1) {

        close(s->fd);

        s->fd = -1;

    s->fd = monitor_get_fd(mon, fdname);

    if (s->fd == -1) {

        goto err_after_alloc;

    }

    if (fcntl(s->fd, F_SETFL, O_NONBLOCK) == -1) {

        goto err_after_open;

    }

        goto err;

    }

    qemu_announce_self();

    /* we've successfully migrated, close the fd */

    qemu_set_fd_handler2(qemu_stdio_fd(f), NULL, NULL, NULL, NULL);

    if (autostart)

    int fd;

    QEMUFile *f;

    fd = strtol(infd, NULL, 0);

    f = qemu_fdopen(fd, "rb");

    if(f == NULL) {

        return -errno;

    }

//#define DEBUG_MIGRATION_TCP

#ifdef DEBUG_MIGRATION_TCP

    do { printf("migration-tcp: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

static int tcp_close(FdMigrationState *s)

{

    if (s->fd != -1) {

        close(s->fd);

        s->fd = -1;

    int val, ret;

    socklen_t valsize = sizeof(val);

    do {

        ret = getsockopt(s->fd, SOL_SOCKET, SO_ERROR, (void *) &val, &valsize);

    } while (ret == -1 && (s->get_error(s)) == EINTR);

    if (val == 0)

        migrate_fd_connect(s);

    else {

        migrate_fd_error(s);

    }

}

    } while (ret == -EINTR);

    if (ret < 0 && ret != -EINPROGRESS && ret != -EWOULDBLOCK) {

        close(s->fd);

        qemu_free(s);

        return NULL;

        c = qemu_accept(s, (struct sockaddr *)&addr, &addrlen);

    } while (c == -1 && socket_error() == EINTR);

    if (c == -1) {

        fprintf(stderr, "could not accept migration connection\n");

        goto out_fopen;

    }

    qemu_announce_self();

    /* we've successfully migrated, close the server socket */

    qemu_set_fd_handler2(s, NULL, NULL, NULL, NULL);

//#define DEBUG_MIGRATION_UNIX

#ifdef DEBUG_MIGRATION_UNIX

    do { printf("migration-unix: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

static int unix_close(FdMigrationState *s)

{

    if (s->fd != -1) {

        close(s->fd);

        s->fd = -1;

    int val, ret;

    socklen_t valsize = sizeof(val);

    do {

        ret = getsockopt(s->fd, SOL_SOCKET, SO_ERROR, (void *) &val, &valsize);

    } while (ret == -1 && (s->get_error(s)) == EINTR);

    if (val == 0)

        migrate_fd_connect(s);

    else {

        migrate_fd_error(s);

    }

}

    s->bandwidth_limit = bandwidth_limit;

    s->fd = qemu_socket(PF_UNIX, SOCK_STREAM, 0);

    if (s->fd < 0) {

        goto err_after_alloc;

    }

    } while (ret == -EINTR);

    if (ret < 0 && ret != -EINPROGRESS && ret != -EWOULDBLOCK) {

        goto err_after_open;

    }

        c = qemu_accept(s, (struct sockaddr *)&addr, &addrlen);

    } while (c == -1 && socket_error() == EINTR);

    if (c == -1) {

        fprintf(stderr, "could not accept migration connection\n");

        goto out_fopen;

    }

    qemu_announce_self();

    /* we've successfully migrated, close the server socket */

    qemu_set_fd_handler2(s, NULL, NULL, NULL, NULL);

    struct sockaddr_un un;

    int sock;

    sock = qemu_socket(PF_UNIX, SOCK_STREAM, 0);

    if (sock < 0) {

//#define DEBUG_MIGRATION

#ifdef DEBUG_MIGRATION

    do { printf("migration: " fmt, ## __VA_ARGS__); } while (0)

#else

    do { } while (0)

#endif

{

    s->mon = mon;

    if (monitor_suspend(mon) == 0) {

    } else {

        monitor_printf(mon, "terminal does not allow synchronous "

                       "migration, continuing detached\n");

void migrate_fd_error(FdMigrationState *s)

{

    s->state = MIG_STATE_ERROR;

    migrate_fd_cleanup(s);

}

    qemu_set_fd_handler2(s->fd, NULL, NULL, NULL, NULL);

    if (s->file) {

        qemu_fclose(s->file);

        s->file = NULL;

    }

                                      migrate_fd_wait_for_unfreeze,

                                      migrate_fd_close);

    ret = qemu_savevm_state_begin(s->mon, s->file, s->mig_state.blk,

                                  s->mig_state.shared);

    if (ret < 0) {

        migrate_fd_error(s);

        return;

    }

    FdMigrationState *s = opaque;

    if (s->state != MIG_STATE_ACTIVE) {

        return;

    }

    if (qemu_savevm_state_iterate(s->mon, s->file) == 1) {

        int state;

        int old_vm_running = vm_running;

        vm_stop(0);

        qemu_aio_flush();

    if (s->state != MIG_STATE_ACTIVE)

        return;

    s->state = MIG_STATE_CANCELLED;

    qemu_savevm_state_cancel(s->mon, s->file);

{

    FdMigrationState *s = migrate_to_fms(mig_state);

    if (s->state == MIG_STATE_ACTIVE) {

        s->state = MIG_STATE_CANCELLED;

    FdMigrationState *s = opaque;

    int ret;

    if (s->state != MIG_STATE_ACTIVE)

        return;

static const uint8_t rfc1533_cookie[] = { RFC1533_COOKIE };

#ifdef DEBUG

do if (slirp_debug & DBG_CALL) { fprintf(dfd, fmt, ##  __VA_ARGS__); fflush(dfd); } while (0)

#else

#endif

static BOOTPClient *get_new_addr(Slirp *slirp, struct in_addr *paddr,

            if (p >= p_end)

                break;

            len = *p++;

            switch(tag) {

            case RFC2132_MSG_TYPE:

    /* extract exact DHCP msg type */

    dhcp_decode(bp, &dhcp_msg_type, &preq_addr);

    if (preq_addr)

    else

    if (dhcp_msg_type == 0)

        dhcp_msg_type = DHCPREQUEST; /* Force reply for old BOOTP clients */

         new_addr:

            bc = get_new_addr(slirp, &daddr.sin_addr, slirp->client_ethaddr);

            if (!bc) {

                return;

            }

        }

    q += 4;

    if (bc) {

                (dhcp_msg_type == DHCPDISCOVER) ? "offered" : "ack'ed",

                ntohl(daddr.sin_addr.s_addr));

    } else {

        static const char nak_msg[] = "requested address not available";

        *q++ = RFC2132_MSG_TYPE;

        *q++ = 1;

//#define DEBUG

#ifdef DEBUG

#else

#endif

#define USBDBG_DEVOPENED "husb: opened %s/devices\n"

                return;

            }

            return;

        }

        p = aurb->packet;

                aurb, aurb->urb.status, aurb->urb.actual_length);

	if (p) {

    AsyncURB *aurb = opaque;

    USBHostDevice *s = aurb->hdev;

    /* Mark it as dead (see async_complete above) */

    aurb->packet = NULL;

    int r = ioctl(s->fd, USBDEVFS_DISCARDURB, aurb);

    if (r < 0) {

    }

}

    if (configuration == 0) /* address state - ignore */

        return 1;