Revision d12f4c38

b/hw/ppc_chrp.c
330 330
    qemu_register_reset(&cpu_ppc_reset, env);
331 331
    register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
332 332

  
333
    /* Default CPU is a generic 74x/75x */
334 333
    if (cpu_model == NULL)
335
        cpu_model = "750";
336
    /* XXX: CPU model (or PVR) should be provided on command line */
337
    //    ppc_find_by_name("750gx", &def); // Linux boot OK
338
    //    ppc_find_by_name("750fx", &def); // Linux boot OK
339
    /* Linux does not boot on 750cxe (and probably other 750cx based)
340
     * because it assumes it has 8 IBAT & DBAT pairs as it only have 4.
341
     */
334
        cpu_model = "default";
342 335
    ppc_find_by_name(cpu_model, &def);
343 336
    if (def == NULL) {
344 337
        cpu_abort(env, "Unable to find PowerPC CPU definition\n");
b/hw/ppc_prep.c
544 544
    qemu_register_reset(&cpu_ppc_reset, env);
545 545
    register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
546 546

  
547
    /* Default CPU is a 604 */
548 547
    if (cpu_model == NULL)
549
        cpu_model = "604";
548
        cpu_model = "default";
550 549
    ppc_find_by_name(cpu_model, &def);
551 550
    if (def == NULL) {
552 551
        cpu_abort(env, "Unable to find PowerPC CPU definition\n");
b/target-ppc/translate_init.c
3539 3539

  
3540 3540
/* Default PowerPC target will be PowerPC 32 */
3541 3541
#if defined (TARGET_PPC64) && 0 // XXX: TODO
3542
#define CPU_POWERPC_PPC               CPU_POWERPC_PPC64
3543
#define POWERPC_INSNS_PPC_GENERIC     POWERPC_INSNS_PPC64
3544
#define POWERPC_MSRM_PPC_GENERIC      POWERPC_MSRM_PPC64
3545
#define POWERPC_MMU_PPC_GENERIC       POWERPC_MMU_PPC64
3546
#define POWERPC_EXCP_PPC_GENERIC      POWERPC_EXCP_PPC64
3547
#define POWERPC_INPUT_PPC_GENERIC     POWERPC_INPUT_PPC64
3548
#define init_proc_PPC_GENERIC         init_proc_PPC64
3542
#define CPU_POWERPC_DEFAULT   CPU_POWERPC_PPC64
3543
#define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC64
3544
#define POWERPC_MSRM_DEFAULT  POWERPC_MSRM_PPC64
3545
#define POWERPC_MMU_DEFAULT   POWERPC_MMU_PPC64
3546
#define POWERPC_EXCP_DEFAULT  POWERPC_EXCP_PPC64
3547
#define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC64
3548
#define init_proc_DEFAULT     init_proc_PPC64
3549 3549
#else
3550
#define CPU_POWERPC_PPC               CPU_POWERPC_PPC32
3551
#define POWERPC_INSNS_PPC_GENERIC     POWERPC_INSNS_PPC32
3552
#define POWERPC_MSRM_PPC_GENERIC      POWERPC_MSRM_PPC32
3553
#define POWERPC_MMU_PPC_GENERIC       POWERPC_MMU_PPC32
3554
#define POWERPC_EXCP_PPC_GENERIC      POWERPC_EXCP_PPC32
3555
#define POWERPC_INPUT_PPC_GENERIC     POWERPC_INPUT_PPC32
3556
#define init_proc_PPC_GENERIC         init_proc_PPC32
3550
#define CPU_POWERPC_DEFAULT   CPU_POWERPC_PPC32
3551
#define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32
3552
#define POWERPC_MSRM_DEFAULT  POWERPC_MSRM_PPC32
3553
#define POWERPC_MMU_DEFAULT   POWERPC_MMU_PPC32
3554
#define POWERPC_EXCP_DEFAULT  POWERPC_EXCP_PPC32
3555
#define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC32
3556
#define init_proc_DEFAULT     init_proc_PPC32
3557 3557
#endif
3558 3558

  
3559 3559
/*****************************************************************************/
......
4607 4607
    /* PowerPC 750E (G3)                                                     */
4608 4608
    POWERPC_DEF("750e",        CPU_POWERPC_750E,        0xFFFFFFFF, 7x0),
4609 4609
    /* PowerPC 750FL (G3 embedded)                                           */
4610
    POWERPC_DEF("750fl",       CPU_POWERPC_750FL,       0xFFFFFFFF, 7x0),
4610
    POWERPC_DEF("750fl",       CPU_POWERPC_750FL,       0xFFFFFFFF, 750fx),
4611 4611
    /* PowerPC 750FX (G3 embedded)                                           */
4612 4612
    POWERPC_DEF("750fx",       CPU_POWERPC_750FX,       0xFFFFFFFF, 750fx),
4613 4613
    /* PowerPC 750FX v1.0 (G3 embedded)                                      */
......
4621 4621
    /* PowerPC 750FX v2.3 (G3 embedded)                                      */
4622 4622
    POWERPC_DEF("750fx2.3",    CPU_POWERPC_750FX_v23,   0xFFFFFFFF, 750fx),
4623 4623
    /* PowerPC 750GL (G3 embedded)                                           */
4624
    POWERPC_DEF("750gl",       CPU_POWERPC_750GL,       0xFFFFFFFF, 7x0),
4624
    POWERPC_DEF("750gl",       CPU_POWERPC_750GL,       0xFFFFFFFF, 750fx),
4625 4625
    /* PowerPC 750GX (G3 embedded)                                           */
4626 4626
    POWERPC_DEF("750gx",       CPU_POWERPC_750GX,       0xFFFFFFFF, 750fx),
4627 4627
    /* PowerPC 750GX v1.0 (G3 embedded)                                      */
......
4993 4993
#endif
4994 4994
#endif
4995 4995
    POWERPC_DEF("ppc32",       CPU_POWERPC_PPC32,       0xFFFFFFFF, PPC32),
4996
    POWERPC_DEF("ppc",         CPU_POWERPC_DEFAULT,     0xFFFFFFFF, DEFAULT),
4996 4997
    /* Fallback                                                              */
4997
    POWERPC_DEF("ppc",         CPU_POWERPC_PPC,         0xFFFFFFFF, PPC_GENERIC),
4998
    POWERPC_DEF("default",     CPU_POWERPC_DEFAULT,     0xFFFFFFFF, DEFAULT),
4998 4999
};
4999 5000

  
5000 5001
/*****************************************************************************/
......
5463 5464

  
5464 5465
    ret = -1;
5465 5466
    *def = NULL;
5466
    for (i = 0; strcmp(ppc_defs[i].name, "ppc") != 0; i++) {
5467
    for (i = 0; strcmp(ppc_defs[i].name, "default") != 0; i++) {
5467 5468
        if (strcasecmp(name, ppc_defs[i].name) == 0) {
5468 5469
            *def = &ppc_defs[i];
5469 5470
            ret = 0;
......
5499 5500
    for (i = 0; ; i++) {
5500 5501
        (*cpu_fprintf)(f, "PowerPC %-16s PVR %08x\n",
5501 5502
                       ppc_defs[i].name, ppc_defs[i].pvr);
5502
        if (strcmp(ppc_defs[i].name, "ppc") == 0)
5503
        if (strcmp(ppc_defs[i].name, "default") == 0)
5503 5504
            break;
5504 5505
    }
5505 5506
}

Also available in: Unified diff