Statistics
| Branch: | Revision:

root / target-sparc @ d1afc48b

Name Size
TODO 2.2 kB
cpu.h 21.5 kB
exec.h 283 Bytes
helper.c 58.5 kB
helper.h 4.7 kB
machine.c 6.8 kB
op_helper.c 119 kB
translate.c 192.2 kB

Latest revisions

# Date Author Comment
d1afc48b 07/21/2011 11:02 pm Tsuneo Saito

SPARC64: implement addtional MMU faults related to nonfaulting load

This patch implements MMU faults caused by TTE.NFO and TTE.E:
- access other than nonfaulting load to a page marked NFO should
raise data_access_exception
- nonfaulting load to a page marked with E bit should raise...

b7785d20 07/21/2011 11:01 pm Tsuneo Saito

SPARC64: implement MMU miss traps on nonfaulting loads

Nonfaulting loads should raise fast_data_access_MMU_miss traps as
normal loads do. It is up to the guest OS kernel that detect MMU misses
on nonfaulting load instructions and make them complete without signaling....

103dcbe5 07/21/2011 11:01 pm Tsuneo Saito

SPARC64: fix fault status overwritten on nonfaulting load

cpu_get_phys_page_nofault() calls get_physical_address() twice,
that results in overwriting the fault status in the SFSR.
We need this change in order for nonfaulting loads to raising MMU faults
as normal loads do....

b64b6436 07/21/2011 10:59 pm Tsuneo Saito

SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()

This patch makes cpu_get_phys_page_debug() independent from
cpu_get_phys_page_nofault() in advance of implementing nonfaulting load.
This also modifies cpu_get_phys_page_nofault() to be compiled only on...

321365ab 07/21/2011 10:59 pm Tsuneo Saito

SPARC64: introduce a convenience function for getting physical addresses

Introduce cpu_sparc_get_phys_page() to be used as a help for splitting
cpu_get_phys_page_debug() from cpu_get_phys_page_nofault().

Signed-off-by: Tsuneo Saito <>
Signed-off-by: Blue Swirl <>

ccc76c24 07/21/2011 10:58 pm Tsuneo Saito

SPARC64: SFSR cleanup and fix

Add macros for SFSR fields and use macros instead of magic numbers.
Also fix the update of the register fields on MMU faults.

Signed-off-by: Tsuneo Saito <>
Signed-off-by: Blue Swirl <>

06e12b65 07/21/2011 10:57 pm Tsuneo Saito

SPARC64: TTE bits cleanup

Add macros for TTE bits and modify to use macros instead of
magic numbers.

Signed-off-by: Tsuneo Saito <>
Signed-off-by: Blue Swirl <>

b14ef7c9 07/21/2011 12:28 am Blue Swirl

Fix unassigned memory access handling

cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory
access handling. Fix them by always passing CPUState to the handlers.

Reported-by: Hervé Poussineau <>
Signed-off-by: Blue Swirl <>

b5176d27 07/21/2011 12:11 am Tsuneo Saito

SPARC64: treat UA2007 ASI_BLK_* as translating ASIs.

UA2007 ASI_BLK_* should be added in is_translating_asi().

Signed-off-by: Tsuneo Saito <>
Acked-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

b7d69dc2 07/20/2011 11:44 pm Tsuneo Saito

SPARC64: add missing break on fmovdcc

"break" is missing on V9 fmovdcc (%icc).

Signed-off-by: Tsuneo Saito <>
Signed-off-by: Blue Swirl <>

View revisions

Also available in: Atom