Revision d26bc211 target-mips/helper.c
| b/target-mips/helper.c | ||
|---|---|---|
| 76 | 76 |
target_ulong mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1); |
| 77 | 77 |
target_ulong tag = address & ~mask; |
| 78 | 78 |
target_ulong VPN = tlb->VPN & ~mask; |
| 79 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 79 |
#if defined(TARGET_MIPS64) |
|
| 80 | 80 |
tag &= env->SEGMask; |
| 81 | 81 |
#endif |
| 82 | 82 |
|
| ... | ... | |
| 108 | 108 |
int user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM; |
| 109 | 109 |
int supervisor_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_SM; |
| 110 | 110 |
int kernel_mode = !user_mode && !supervisor_mode; |
| 111 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 111 |
#if defined(TARGET_MIPS64) |
|
| 112 | 112 |
int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; |
| 113 | 113 |
int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; |
| 114 | 114 |
int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0; |
| ... | ... | |
| 130 | 130 |
} else {
|
| 131 | 131 |
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type); |
| 132 | 132 |
} |
| 133 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 133 |
#if defined(TARGET_MIPS64) |
|
| 134 | 134 |
} else if (address < 0x4000000000000000ULL) {
|
| 135 | 135 |
/* xuseg */ |
| 136 | 136 |
if (UX && address < (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
|
| ... | ... | |
| 305 | 305 |
((address >> 9) & 0x007ffff0); |
| 306 | 306 |
env->CP0_EntryHi = |
| 307 | 307 |
(env->CP0_EntryHi & 0xFF) | (address & (TARGET_PAGE_MASK << 1)); |
| 308 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 308 |
#if defined(TARGET_MIPS64) |
|
| 309 | 309 |
env->CP0_EntryHi &= env->SEGMask; |
| 310 | 310 |
env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) | |
| 311 | 311 |
((address & 0xC00000000000ULL) >> (env->SEGBITS - 9)) | |
| ... | ... | |
| 425 | 425 |
case EXCP_TLBL: |
| 426 | 426 |
cause = 2; |
| 427 | 427 |
if (env->error_code == 1 && !(env->CP0_Status & (1 << CP0St_EXL))) {
|
| 428 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 428 |
#if defined(TARGET_MIPS64) |
|
| 429 | 429 |
int R = env->CP0_BadVAddr >> 62; |
| 430 | 430 |
int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; |
| 431 | 431 |
int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; |
| ... | ... | |
| 473 | 473 |
case EXCP_TLBS: |
| 474 | 474 |
cause = 3; |
| 475 | 475 |
if (env->error_code == 1 && !(env->CP0_Status & (1 << CP0St_EXL))) {
|
| 476 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 476 |
#if defined(TARGET_MIPS64) |
|
| 477 | 477 |
int R = env->CP0_BadVAddr >> 62; |
| 478 | 478 |
int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0; |
| 479 | 479 |
int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0; |
| ... | ... | |
| 559 | 559 |
mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1); |
| 560 | 560 |
if (tlb->V0) {
|
| 561 | 561 |
addr = tlb->VPN & ~mask; |
| 562 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 562 |
#if defined(TARGET_MIPS64) |
|
| 563 | 563 |
if (addr >= (0xFFFFFFFF80000000ULL & env->SEGMask)) {
|
| 564 | 564 |
addr |= 0x3FFFFF0000000000ULL; |
| 565 | 565 |
} |
| ... | ... | |
| 572 | 572 |
} |
| 573 | 573 |
if (tlb->V1) {
|
| 574 | 574 |
addr = (tlb->VPN & ~mask) | ((mask >> 1) + 1); |
| 575 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
|
| 575 |
#if defined(TARGET_MIPS64) |
|
| 576 | 576 |
if (addr >= (0xFFFFFFFF80000000ULL & env->SEGMask)) {
|
| 577 | 577 |
addr |= 0x3FFFFF0000000000ULL; |
| 578 | 578 |
} |
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