Revision d350d97d

b/hw/pci.c
50 50 
static void pci_set_irq(void *opaque, int irq_num, int level);
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target_phys_addr_t pci_mem_base;


  		





  
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static uint16_t pci_default_sub_vendor_id = PCI_SUBVENDOR_ID_REDHAT_QUMRANET;


  		





  
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static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU;


  		





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static int pci_irq_index;


  		





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static PCIBus *first_bus;


  		





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  ......




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    return 0;


  		





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}


  		





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static int pci_set_default_subsystem_id(PCIDevice *pci_dev)


  		





  
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{


  		





  
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    uint16_t *id;


  		





  
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    id = (void*)(&pci_dev->config[PCI_SUBVENDOR_ID]);


  		





  
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    id[0] = cpu_to_le16(pci_default_sub_vendor_id);


  		





  
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    id[1] = cpu_to_le16(pci_default_sub_device_id);


  		





  
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    return 0;


  		





  
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}


  		





  
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/* -1 for devfn means auto assign */


  		





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PCIDevice *pci_register_device(PCIBus *bus, const char *name,


  		





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                               int instance_size, int devfn,


  		





  ......




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    pci_dev->devfn = devfn;


  		





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    pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);


  		





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    memset(pci_dev->irq_state, 0, sizeof(pci_dev->irq_state));


  		





  
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    pci_set_default_subsystem_id(pci_dev);


  		





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    if (!config_read)


  		





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        config_read = pci_default_read_config;


  		












  

    
      b/hw/pci.h
    
  






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extern target_phys_addr_t pci_mem_base;


  		





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/* see pci-ids.txt */


  		





  
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#define PCI_VENDOR_ID_REDHAT_QUMRANET    0x1af4


  		





  
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#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4


  		





  
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#define PCI_SUBDEVICE_ID_QEMU            0x1100


  		





  
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#define PCI_DEVICE_ID_VIRTIO_NET         0x1000


  		





  
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#define PCI_DEVICE_ID_VIRTIO_BLOCK       0x1001


  		





  
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#define PCI_DEVICE_ID_VIRTIO_BALLOON     0x1002


  		





  
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typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,


  		





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                                uint32_t address, uint32_t data, int len);


  		





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typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,


  		





  ......




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#define PCI_COMMAND		0x04	/* 16 bits */


  		





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#define  PCI_COMMAND_IO		0x1	/* Enable response in I/O space */


  		





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#define  PCI_COMMAND_MEMORY	0x2	/* Enable response in Memory space */


  		





  
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#define PCI_REVISION            0x08


  		





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#define PCI_CLASS_DEVICE        0x0a    /* Device class */


  		





  
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#define PCI_SUBVENDOR_ID	0x2c	/* 16 bits */


  		





  
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#define PCI_SUBDEVICE_ID	0x2e	/* 16 bits */


  		





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#define PCI_INTERRUPT_LINE	0x3c	/* 8 bits */


  		





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#define PCI_INTERRUPT_PIN	0x3d	/* 8 bits */


  		





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#define PCI_MIN_GNT		0x3e	/* 8 bits */


  		












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