Revision d350d97d hw/pci.h

b/hw/pci.h
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extern target_phys_addr_t pci_mem_base;


  		





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/* see pci-ids.txt */


  		





  
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#define PCI_VENDOR_ID_REDHAT_QUMRANET    0x1af4


  		





  
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#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4


  		





  
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#define PCI_SUBDEVICE_ID_QEMU            0x1100


  		





  
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#define PCI_DEVICE_ID_VIRTIO_NET         0x1000


  		





  
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#define PCI_DEVICE_ID_VIRTIO_BLOCK       0x1001


  		





  
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#define PCI_DEVICE_ID_VIRTIO_BALLOON     0x1002


  		





  
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typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,


  		





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                                uint32_t address, uint32_t data, int len);


  		





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typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,


  		





  ......




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#define PCI_COMMAND		0x04	/* 16 bits */


  		





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#define  PCI_COMMAND_IO		0x1	/* Enable response in I/O space */


  		





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#define  PCI_COMMAND_MEMORY	0x2	/* Enable response in Memory space */


  		





  
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#define PCI_REVISION            0x08


  		





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#define PCI_CLASS_DEVICE        0x0a    /* Device class */


  		





  
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#define PCI_SUBVENDOR_ID	0x2c	/* 16 bits */


  		





  
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#define PCI_SUBDEVICE_ID	0x2e	/* 16 bits */


  		





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#define PCI_INTERRUPT_LINE	0x3c	/* 8 bits */


  		





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#define PCI_INTERRUPT_PIN	0x3d	/* 8 bits */


  		





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#define PCI_MIN_GNT		0x3e	/* 8 bits */


  		












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