Revision d36cd60e target-i386/op.c
| b/target-i386/op.c | ||
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} |
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/* multiply/divide */ |
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/* XXX: add eflags optimizations */ |
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/* XXX: add non P4 style flags */ |
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void OPPROTO op_mulb_AL_T0(void) |
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{
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unsigned int res; |
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res = (uint8_t)EAX * (uint8_t)T0; |
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EAX = (EAX & 0xffff0000) | res; |
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CC_DST = res; |
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CC_SRC = (res & 0xff00); |
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} |
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| ... | ... | |
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int res; |
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res = (int8_t)EAX * (int8_t)T0; |
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EAX = (EAX & 0xffff0000) | (res & 0xffff); |
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CC_DST = res; |
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CC_SRC = (res != (int8_t)res); |
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} |
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|
| ... | ... | |
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res = (uint16_t)EAX * (uint16_t)T0; |
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EAX = (EAX & 0xffff0000) | (res & 0xffff); |
| 193 | 199 |
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff); |
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CC_DST = res; |
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CC_SRC = res >> 16; |
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} |
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|
| ... | ... | |
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res = (int16_t)EAX * (int16_t)T0; |
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EAX = (EAX & 0xffff0000) | (res & 0xffff); |
| 202 | 209 |
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff); |
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CC_DST = res; |
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CC_SRC = (res != (int16_t)res); |
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} |
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|
| ... | ... | |
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res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0); |
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EAX = res; |
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EDX = res >> 32; |
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CC_DST = res; |
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CC_SRC = res >> 32; |
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} |
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|
| ... | ... | |
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res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0); |
| 219 | 228 |
EAX = res; |
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EDX = res >> 32; |
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CC_DST = res; |
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| 221 | 231 |
CC_SRC = (res != (int32_t)res); |
| 222 | 232 |
} |
| 223 | 233 |
|
| ... | ... | |
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int res; |
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res = (int16_t)T0 * (int16_t)T1; |
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T0 = res; |
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CC_DST = res; |
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CC_SRC = (res != (int16_t)res); |
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} |
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|
| ... | ... | |
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int64_t res; |
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res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1); |
| 236 | 247 |
T0 = res; |
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CC_DST = res; |
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| 237 | 249 |
CC_SRC = (res != (int32_t)res); |
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} |
| 239 | 251 |
|
| ... | ... | |
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return CC_SRC & CC_C; |
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} |
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static int compute_c_mul(void) |
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{
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int cf; |
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cf = (CC_SRC != 0); |
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return cf; |
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} |
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static int compute_all_mul(void) |
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{
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int cf, pf, af, zf, sf, of; |
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cf = (CC_SRC != 0); |
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pf = 0; /* undefined */ |
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af = 0; /* undefined */ |
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zf = 0; /* undefined */ |
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sf = 0; /* undefined */ |
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of = cf << 11; |
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return cf | pf | af | zf | sf | of; |
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} |
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CCTable cc_table[CC_OP_NB] = {
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[CC_OP_DYNAMIC] = { /* should never happen */ },
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[CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
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[CC_OP_MUL] = { compute_all_mul, compute_c_mul },
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[CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
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[CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
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[CC_OP_MULL] = { compute_all_mull, compute_c_mull },
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[CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
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[CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
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