Revision d36cd60e target-i386/translate.c

b/target-i386/translate.c
2016 2016 
            switch(ot) {
2017 2017 
            case OT_BYTE:
2018 2018 
                gen_op_mulb_AL_T0();
2019 
                s->cc_op = CC_OP_MULB;
2019 2020 
                break;
2020 2021 
            case OT_WORD:
2021 2022 
                gen_op_mulw_AX_T0();
2023 
                s->cc_op = CC_OP_MULW;
2022 2024 
                break;
2023 2025 
            default:
2024 2026 
            case OT_LONG:
2025 2027 
                gen_op_mull_EAX_T0();
2028 
                s->cc_op = CC_OP_MULL;
2026 2029 
                break;
2027 2030 
            }
2028 
            s->cc_op = CC_OP_MUL;
2029 2031 
            break;
2030 2032 
        case 5: /* imul */
2031 2033 
            switch(ot) {
2032 2034 
            case OT_BYTE:
2033 2035 
                gen_op_imulb_AL_T0();
2036 
                s->cc_op = CC_OP_MULB;
2034 2037 
                break;
2035 2038 
            case OT_WORD:
2036 2039 
                gen_op_imulw_AX_T0();
2040 
                s->cc_op = CC_OP_MULW;
2037 2041 
                break;
2038 2042 
            default:
2039 2043 
            case OT_LONG:
2040 2044 
                gen_op_imull_EAX_T0();
2045 
                s->cc_op = CC_OP_MULL;
2041 2046 
                break;
2042 2047 
            }
2043 
            s->cc_op = CC_OP_MUL;
2044 2048 
            break;
2045 2049 
        case 6: /* div */
2046 2050 
            switch(ot) {
......
2235 2239 
            gen_op_imulw_T0_T1();
2236 2240 
        }
2237 2241 
        gen_op_mov_reg_T0[ot][reg]();
2238 
        s->cc_op = CC_OP_MUL;
2242 
        s->cc_op = CC_OP_MULB + ot;
2239 2243 
        break;
2240 2244 
    case 0x1c0:
2241 2245 
    case 0x1c1: /* xadd Ev, Gv */

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