Revision d42f183c tcg/x86_64/tcg-target.c

b/tcg/x86_64/tcg-target.c
194 194
#define ARITH_XOR 6
195 195
#define ARITH_CMP 7
196 196

  
197
#define SHIFT_ROL 0
198
#define SHIFT_ROR 1
197 199
#define SHIFT_SHL 4
198 200
#define SHIFT_SHR 5
199 201
#define SHIFT_SAR 7
......
1049 1051
    case INDEX_op_sar_i32:
1050 1052
        c = SHIFT_SAR;
1051 1053
        goto gen_shift32;
1052
        
1054
    case INDEX_op_rotl_i32:
1055
        c = SHIFT_ROL;
1056
        goto gen_shift32;
1057
    case INDEX_op_rotr_i32:
1058
        c = SHIFT_ROR;
1059
        goto gen_shift32;
1060

  
1053 1061
    case INDEX_op_shl_i64:
1054 1062
        c = SHIFT_SHL;
1055 1063
    gen_shift64:
......
1070 1078
    case INDEX_op_sar_i64:
1071 1079
        c = SHIFT_SAR;
1072 1080
        goto gen_shift64;
1073
        
1081
    case INDEX_op_rotl_i64:
1082
        c = SHIFT_ROL;
1083
        goto gen_shift64;
1084
    case INDEX_op_rotr_i64:
1085
        c = SHIFT_ROR;
1086
        goto gen_shift64;
1087

  
1074 1088
    case INDEX_op_brcond_i32:
1075 1089
        tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 
1076 1090
                       args[3], 0);
......
1230 1244
    { INDEX_op_shl_i32, { "r", "0", "ci" } },
1231 1245
    { INDEX_op_shr_i32, { "r", "0", "ci" } },
1232 1246
    { INDEX_op_sar_i32, { "r", "0", "ci" } },
1247
    { INDEX_op_rotl_i32, { "r", "0", "ci" } },
1248
    { INDEX_op_rotr_i32, { "r", "0", "ci" } },
1233 1249

  
1234 1250
    { INDEX_op_brcond_i32, { "r", "ri" } },
1235 1251

  
......
1259 1275
    { INDEX_op_shl_i64, { "r", "0", "ci" } },
1260 1276
    { INDEX_op_shr_i64, { "r", "0", "ci" } },
1261 1277
    { INDEX_op_sar_i64, { "r", "0", "ci" } },
1278
    { INDEX_op_rotl_i64, { "r", "0", "ci" } },
1279
    { INDEX_op_rotr_i64, { "r", "0", "ci" } },
1262 1280

  
1263 1281
    { INDEX_op_brcond_i64, { "r", "re" } },
1264 1282

  

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