sparc64: interrupt trap handling
cpu_check_irqs- handle SOFTINT register TICK and STICK timer bits- only check interrupt levels greater than PIL value- handle preemption by higher level traps
cpu_exec- handle CPU_INTERRUPT_HARD only if interrupts are enabled...
sparc64: add macros to deal with softint and timer interrupt
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
multiboot: Support arbitrary number of modules.
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
multiboot: Separate multiboot loading into separate file
Move multiboot loading code into separate files as suggested by Alex Graf.
debugcon: support for debugging consoles (e.g. Bochs port 0xe9)
Add generic support for debugging consoles (simple I/O ports whichwhen written to cause debugging output to be written to a target.)The current implementation matches Bochs' port 0xe9, allowing the same...
Merge remote branch 'mst/for_anthony' into staging
loader: don't call realloc(non_null, 0) when no symbols are present
According to C99, realloc(non_null, 0) != free(non_null), that's whyit is forbidden in QEMU.
When there are no symbols, nsyms equals to 0. Free the syms structureand set it to NULL instead of reallocating it with a size of 0....
Sparc64: split DPRINTF into CPUIRQ and EBUS versions
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc64: fix compile with DEBUG_IRQ enabled
Sparc64: move APB PCI memory base to correct location
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