Revision d537cf6c hw/mc146818rtc.c

b/hw/mc146818rtc.c
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    uint8_t cmos_data[128];
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    uint8_t cmos_index;
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    struct tm current_tm;
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    int irq;
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    qemu_irq irq;
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    /* periodic timer */
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    QEMUTimer *periodic_timer;
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    int64_t next_periodic_time;
......
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    rtc_timer_update(s, s->next_periodic_time);
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    s->cmos_data[RTC_REG_C] |= 0xc0;
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    pic_set_irq(s->irq, 1);
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    qemu_irq_raise(s->irq);
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}
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static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
......
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             s->cmos_data[RTC_HOURS_ALARM] == s->current_tm.tm_hour)) {
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            s->cmos_data[RTC_REG_C] |= 0xa0; 
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            pic_set_irq(s->irq, 1);
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            qemu_irq_raise(s->irq);
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        }
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    }
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    /* update ended interrupt */
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    if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
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        s->cmos_data[RTC_REG_C] |= 0x90; 
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        pic_set_irq(s->irq, 1);
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        qemu_irq_raise(s->irq);
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    }
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    /* clear update in progress bit */
......
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            break;
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        case RTC_REG_C:
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            ret = s->cmos_data[s->cmos_index];
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            pic_set_irq(s->irq, 0);
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            qemu_irq_lower(s->irq);
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            s->cmos_data[RTC_REG_C] = 0x00; 
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            break;
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        default:
......
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    return 0;
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}
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RTCState *rtc_init(int base, int irq)
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RTCState *rtc_init(int base, qemu_irq irq)
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{
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    RTCState *s;
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