Revision d537cf6c hw/mips_r4k.c
b/hw/mips_r4k.c | ||
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35 | 35 |
static PITState *pit; /* PIT i8254 */ |
36 | 36 |
|
37 | 37 |
/*i8254 PIT is attached to the IRQ0 at PIC i8259 */ |
38 |
/*The PIC is attached to the MIPS CPU INT0 pin */ |
|
39 |
static void pic_irq_request(void *opaque, int level) |
|
40 |
{ |
|
41 |
cpu_mips_irq_request(opaque, 2, level); |
|
42 |
} |
|
43 | 38 |
|
44 | 39 |
static void mips_qemu_writel (void *opaque, target_phys_addr_t addr, |
45 | 40 |
uint32_t val) |
... | ... | |
152 | 147 |
RTCState *rtc_state; |
153 | 148 |
int i; |
154 | 149 |
mips_def_t *def; |
150 |
qemu_irq *i8259; |
|
155 | 151 |
|
156 | 152 |
/* init CPUs */ |
157 | 153 |
if (cpu_model == NULL) { |
... | ... | |
203 | 199 |
} |
204 | 200 |
|
205 | 201 |
/* Init CPU internal devices */ |
202 |
cpu_mips_irq_init_cpu(env); |
|
206 | 203 |
cpu_mips_clock_init(env); |
207 | 204 |
cpu_mips_irqctrl_init(); |
208 | 205 |
|
209 |
rtc_state = rtc_init(0x70, 8); |
|
206 |
/* The PIC is attached to the MIPS CPU INT0 pin */ |
|
207 |
i8259 = i8259_init(env->irq[2]); |
|
208 |
|
|
209 |
rtc_state = rtc_init(0x70, i8259[8]); |
|
210 | 210 |
|
211 | 211 |
/* Register 64 KB of ISA IO space at 0x14000000 */ |
212 | 212 |
isa_mmio_init(0x14000000, 0x00010000); |
213 | 213 |
isa_mem_base = 0x10000000; |
214 | 214 |
|
215 |
isa_pic = pic_init(pic_irq_request, env); |
|
216 |
pit = pit_init(0x40, 0); |
|
215 |
pit = pit_init(0x40, i8259[0]); |
|
217 | 216 |
|
218 | 217 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
219 | 218 |
if (serial_hds[i]) { |
220 |
serial_init(&pic_set_irq_new, isa_pic, |
|
221 |
serial_io[i], serial_irq[i], serial_hds[i]); |
|
219 |
serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
|
222 | 220 |
} |
223 | 221 |
} |
224 | 222 |
|
... | ... | |
228 | 226 |
if (nd_table[0].vlan) { |
229 | 227 |
if (nd_table[0].model == NULL |
230 | 228 |
|| strcmp(nd_table[0].model, "ne2k_isa") == 0) { |
231 |
isa_ne2000_init(0x300, 9, &nd_table[0]);
|
|
229 |
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
|
|
232 | 230 |
} else { |
233 | 231 |
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model); |
234 | 232 |
exit (1); |
... | ... | |
236 | 234 |
} |
237 | 235 |
|
238 | 236 |
for(i = 0; i < 2; i++) |
239 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
|
|
237 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
|
|
240 | 238 |
bs_table[2 * i], bs_table[2 * i + 1]); |
241 | 239 |
|
242 |
kbd_init();
|
|
240 |
i8042_init(i8259[1], i8259[12], 0x60);
|
|
243 | 241 |
ds1225y_init(0x9000, "nvram"); |
244 | 242 |
} |
245 | 243 |
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